| /external/llvm/test/CodeGen/ARM/ |
| D | atomic-cmp.ll | 8 ; ARM: strexb
12 ; T2: strexb
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| D | atomic-cmpxchg.ll | 44 ; CHECK-ARMV6-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
71 ; CHECK-ARMV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
88 ; CHECK-THUMBV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
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| D | cmpxchg-idioms.ll | 51 ; CHECK: strexb [[STATUS:r[0-9]+]], {{r[0-9]+}}, [r0]
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| D | cmpxchg-O0.ll | 16 ; CHECK: strexb [[STATUS:r[0-9]+]], r2, [r0]
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| D | ldstrex.ll | 69 ; CHECK: strexb r0, r1, [r2]
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| D | atomic-ops-v8.ll | 120 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
408 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
503 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
596 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]]
822 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
1051 ; CHECK: strexb [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | atomic-cmp.ll | 8 ; ARM: strexb
13 ; T2: strexb
|
| D | atomic-cmpxchg.ll | 46 ; CHECK-ARMV6-NEXT: strexb r3, r2, [r0]
69 ; CHECK-ARMV7-NEXT: strexb r3, r2, [r0]
85 ; CHECK-THUMBV7-NEXT: strexb r3, r2, [r0]
|
| D | cmpxchg-idioms.ll | 51 ; CHECK: strexb [[STATUS:r[0-9]+]], {{r[0-9]+}}, [r0]
|
| D | cmpxchg-O0.ll | 18 ; CHECK: strexb [[STATUS:r[0-9]+]], [[NEW]], {{\[}}[[ADDR]]{{\]}}
|
| D | atomic-ops-v8.ll | 120 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
408 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
503 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
596 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]]
822 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
1051 ; CHECK: strexb [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
|
| D | ldstrex.ll | 69 ; CHECK: strexb r0, r1, [r2]
|
| /external/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 80 strexb r1, r2, [r3] label
|
| D | basic-arm-instructions.s | 2863 strexb r1, r3, [r4]
2868 @ CHECK: strexb r1, r3, [r4] @ encoding: [0x93,0x1f,0xc4,0xe1]
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| D | basic-thumb2-instructions.s | 2906 strexb r5, r1, [r7]
2913 @ CHECK: strexb r5, r1, [r7] @ encoding: [0xc7,0xe8,0x45,0x1f]
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 80 strexb r1, r2, [r3] label
|
| D | basic-arm-instructions.s | 2893 strexb r1, r3, [r4]
2898 @ CHECK: strexb r1, r3, [r4] @ encoding: [0x93,0x1f,0xc4,0xe1]
|
| D | basic-thumb2-instructions.s | 3115 strexb r5, r1, [r7]
3122 @ CHECK: strexb r5, r1, [r7] @ encoding: [0xc7,0xe8,0x45,0x1f]
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 331 strexb r0, r1, [ r2 ] label
761 # CHECK-NEXT: 1 3 1.00 * * U strexb r0, r1, [r2]
1201 … - - - - - - - 1.00 - - - strexb r0, r1, [r2]
|
| D | m4-int.s | 340 strexb r0, r1, [ r2 ] label
785 # CHECK-NEXT: 1 1 1.00 * * U strexb r0, r1, [r2]
1223 # CHECK-NEXT: 1.00 strexb r0, r1, [r2]
|
| D | cortex-a57-basic-instructions.s | 682 strexb r1, r3, [r4]
1552 # CHECK-NEXT: 0 0 0.00 * * U strexb r1, r3, [r4]
2429 # CHECK-NEXT: - - - - - - - - strexb r1, r3, [r4]
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| D | cortex-a57-thumb.s | 659 strexb r5, r1, [r7]
1566 # CHECK-NEXT: 0 0 0.00 * * U strexb r5, r1, [r7]
2480 # CHECK-NEXT: - - - - - - - - strexb r5, r1, [r7]
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 935 0xc7,0xe8,0x45,0x1f = strexb r5, r1, [r7]
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| D | basic-arm-instructions.s.cs | 811 0x93,0x1f,0xc4,0xe1 = strexb r1, r3, [r4]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3454 void strexb(Condition cond,
3458 void strexb(Register rd, Register rt, const MemOperand& operand) { in strexb() function
3459 strexb(al, rd, rt, operand); in strexb()
|