| /external/llvm-project/llvm/test/MC/MSP430/ |
| D | addrmode.s | 124 swpb r7 ; CHECK: swpb r7 ; encoding: [0x87,0x10]
125 swpb 2(r7) ; CHECK: swpb 2(r7) ; encoding: [0x97,0x10,0x02,0x00]
126 swpb @r7 ; CHECK: swpb @r7 ; encoding: [0xa7,0x10]
127 swpb @r7+ ; CHECK: swpb @r7+ ; encoding: [0xb7,0x10]
|
| D | invalid.s | 12 swpb.b r7 ; CHECK: :[[@LINE]]:3: error: invalid instruction mnemonic
|
| D | opcode.s | 70 swpb r7 ; CHECK-INST: swpb r7
|
| /external/llvm-project/llvm/test/CodeGen/MSP430/ |
| D | shifts.ll | 58 ; CHECK: swpb r12
69 ; CHECK: swpb r12
82 ; CHECK-NEXT: swpb r12
|
| D | shift-amount-threshold.ll | 157 ; CHECK-NEXT: swpb r12
172 ; CHECK-NEXT: swpb r12
186 ; CHECK-NEXT: swpb r12
200 ; CHECK-NEXT: swpb r12
|
| /external/llvm/test/MC/ARM/ |
| D | obsolete-v8.s | 6 swpb r0, r1, [r2] label
|
| D | basic-arm-instructions.s | 3019 swpb r5, r1, [r9]
3023 @ CHECK: swpb r5, r1, [r9] @ encoding: [0x91,0x50,0x49,0xe1]
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | obsolete-v8.s | 6 swpb r0, r1, [r2] label
|
| D | thumb2-diagnostics.s | 143 swpb r3, r4, [r5]
|
| D | basic-arm-instructions.s | 3049 swpb r5, r1, [r9]
3053 @ CHECK: swpb r5, r1, [r9] @ encoding: [0x91,0x50,0x49,0xe1]
|
| /external/llvm/test/MC/AArch64/ |
| D | armv8.1a-atomic.s | 130 swpb w0, w1, [x2]
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.1a-atomic.s | 130 swpb w0, w1, [x2]
|
| D | armv8.1a-lse.s | 96 swpb w0, w1, [x2]
97 swpb w2, w3, [sp]
1387 swpb b0, b1, [x2]
1392 swpb b2, b3, [sp]
1512 swpb v0.4h, v1.4h, v2.4h
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-atomic.txt | 42 # CHECK: swpb w0, w1, [x2]
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-atomic.txt | 42 # CHECK: swpb w0, w1, [x2]
|
| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.td | 670 "swpb\t$rd",
725 "swpb\t$src",
727 def SWPB16n : II16n<0b001, (outs), (ins indreg:$rs), "swpb\t$rs", []>;
728 def SWPB16p : II16p<0b001, (outs), (ins postreg:$rs), "swpb\t$rs", []>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.td | 670 "swpb\t$rd",
725 "swpb\t$src",
727 def SWPB16n : II16n<0b001, (outs), (ins indreg:$rs), "swpb\t$rs", []>;
728 def SWPB16p : II16p<0b001, (outs), (ins postreg:$rs), "swpb\t$rs", []>;
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 846 0x91,0x50,0x49,0xe1 = swpb r5, r1, [r9]
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.td | 990 "swpb\t$dst",
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2035 # CHECK: swpb r5, r1, [r9
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2035 # CHECK: swpb r5, r1, [r9
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 2004 void swpb(const Register& rs, const Register& rt, const MemOperand& src);
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2993 void swpb(const Register& rs, const Register& rt, const MemOperand& src)
|
| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 1081 { /* ARM_SWPB, ARM_INS_SWPB: swpb${p} $rt, $rt2, $addr */
|
| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 1081 { /* ARM_SWPB, ARM_INS_SWPB: swpb${p} $rt, $rt2, $addr */
|