| /external/llvm-project/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 7 sxtb16 r0, r0 label
8 sxtb16 r0, r0, ror #8 label
17 @ CHECK-7EM: sxtb16 r0, r0 @ encoding: [0x2f,0xfa,0x80,0xf0]
18 @ CHECK-7EM: sxtb16 r0, r0, ror #8 @ encoding: [0x2f,0xfa,0x90,0xf0]
|
| D | basic-thumb2-instructions.s | 3410 sxtb16 r1, r4
3411 sxtb16 r6, r7, ror #0
3412 sxtb16 r3, r1, ror #16
3417 @ CHECK: sxtb16 r1, r4 @ encoding: [0x2f,0xfa,0x84,0xf1]
3418 @ CHECK: sxtb16 r6, r7 @ encoding: [0x2f,0xfa,0x87,0xf6]
3419 @ CHECK: sxtb16 r3, r1, ror #16 @ encoding: [0x2f,0xfa,0xa1,0xf3]
3466 sxtb16 r1, r4
3467 sxtb16 r6, r7, ror #0
3468 sxtb16 r3, r1, ror #16
3473 @ CHECK: sxtb16 r1, r4 @ encoding: [0x2f,0xfa,0x84,0xf1]
[all …]
|
| D | basic-arm-instructions.s | 3121 sxtb16 r1, r4
3122 sxtb16 r6, r7, ror #0
3124 sxtb16 r3, r1, ror #16
3127 @ CHECK: sxtb16 r1, r4 @ encoding: [0x74,0x10,0x8f,0xe6]
3128 @ CHECK: sxtb16 r6, r7 @ encoding: [0x77,0x60,0x8f,0xe6]
3130 @ CHECK: sxtb16 r3, r1, ror #16 @ encoding: [0x71,0x38,0x8f,0xe6]
|
| /external/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 7 sxtb16 r0, r0 label
8 sxtb16 r0, r0, ror #8 label
17 @ CHECK-7EM: sxtb16 r0, r0 @ encoding: [0x2f,0xfa,0x80,0xf0]
18 @ CHECK-7EM: sxtb16 r0, r0, ror #8 @ encoding: [0x2f,0xfa,0x90,0xf0]
|
| D | basic-thumb2-instructions.s | 3151 sxtb16 r1, r4
3152 sxtb16 r6, r7, ror #0
3153 sxtb16 r3, r1, ror #16
3158 @ CHECK: sxtb16 r1, r4 @ encoding: [0x2f,0xfa,0x84,0xf1]
3159 @ CHECK: sxtb16 r6, r7 @ encoding: [0x2f,0xfa,0x87,0xf6]
3160 @ CHECK: sxtb16 r3, r1, ror #16 @ encoding: [0x2f,0xfa,0xa1,0xf3]
3207 sxtb16 r1, r4
3208 sxtb16 r6, r7, ror #0
3209 sxtb16 r3, r1, ror #16
3214 @ CHECK: sxtb16 r1, r4 @ encoding: [0x2f,0xfa,0x84,0xf1]
[all …]
|
| D | basic-arm-instructions.s | 3091 sxtb16 r1, r4
3092 sxtb16 r6, r7, ror #0
3094 sxtb16 r3, r1, ror #16
3097 @ CHECK: sxtb16 r1, r4 @ encoding: [0x74,0x10,0x8f,0xe6]
3098 @ CHECK: sxtb16 r6, r7 @ encoding: [0x77,0x60,0x8f,0xe6]
3100 @ CHECK: sxtb16 r3, r1, ror #16 @ encoding: [0x71,0x38,0x8f,0xe6]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics-rot.ll | 8 ; CHECK: sxtb16 r0, r0, ror #8
14 %0 = tail call i32 @llvm.arm.sxtb16(i32 %or.i)
19 ; CHECK: sxtb16 r0, r0, ror #16
25 %0 = tail call i32 @llvm.arm.sxtb16(i32 %or.i)
30 ; CHECK: sxtb16 r0, r0, ror #24
36 %0 = tail call i32 @llvm.arm.sxtb16(i32 %or.i)
139 declare i32 @llvm.arm.sxtb16(i32)
|
| D | acle-intrinsics.ll | 62 ; CHECK: sxtb16 r0, r0
66 %tmp1 = call i32 @llvm.arm.sxtb16(i32 %tmp)
428 declare i32 @llvm.arm.sxtb16(i32)
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 26 # CHECK: sxtb16
|
| D | thumb2.txt | 2177 # CHECK: sxtb16 r1, r4
2178 # CHECK: sxtb16 r6, r7
2179 # CHECK: sxtb16 r3, r1, ror #16
2231 # CHECK: sxtb16 r1, r4
2232 # CHECK: sxtb16 r6, r7
2233 # CHECK: sxtb16 r3, r1, ror #16
|
| D | basic-arm-instructions.txt | 2107 # CHECK: sxtb16 r1, r4
2108 # CHECK: sxtb16 r6, r7
2110 # CHECK: sxtb16 r3, r1, ror #16
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 26 # CHECK: sxtb16
|
| D | thumb2.txt | 2177 # CHECK: sxtb16 r1, r4
2178 # CHECK: sxtb16 r6, r7
2179 # CHECK: sxtb16 r3, r1, ror #16
2231 # CHECK: sxtb16 r1, r4
2232 # CHECK: sxtb16 r6, r7
2233 # CHECK: sxtb16 r3, r1, ror #16
|
| D | basic-arm-instructions.txt | 2107 # CHECK: sxtb16 r1, r4
2108 # CHECK: sxtb16 r6, r7
2110 # CHECK: sxtb16 r3, r1, ror #16
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 1020 0x2f,0xfa,0x84,0xf1 = sxtb16 r1, r4
1021 0x2f,0xfa,0x87,0xf6 = sxtb16 r6, r7
1022 0x2f,0xfa,0xa1,0xf3 = sxtb16 r3, r1, ror #16
1039 0x2f,0xfa,0x84,0xf1 = sxtb16 r1, r4
1040 0x2f,0xfa,0x87,0xf6 = sxtb16 r6, r7
1041 0x2f,0xfa,0xa1,0xf3 = sxtb16 r3, r1, ror #16
|
| D | basic-arm-instructions.s.cs | 867 0x74,0x10,0x8f,0xe6 = sxtb16 r1, r4
868 0x77,0x60,0x8f,0xe6 = sxtb16 r6, r7
870 0x71,0x38,0x8f,0xe6 = sxtb16 r3, r1, ror #16
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | cortex-a57-thumb.s | 734 sxtb16 r1, r4
735 sxtb16 r6, r7
736 sxtb16 r3, r1, ror #16
752 sxtb16 r1, r4
753 sxtb16 r6, r7
754 sxtb16 r3, r1, ror #16
1641 # CHECK-NEXT: 1 1 0.50 sxtb16 r1, r4
1642 # CHECK-NEXT: 1 1 0.50 sxtb16 r6, r7
1643 # CHECK-NEXT: 1 1 0.50 sxtb16 r3, r1, ror #16
1659 # CHECK-NEXT: 1 1 0.50 sxtb16 r1, r4
[all …]
|
| D | m7-int.s | 372 sxtb16 r0, r1 label
373 sxtb16 r0, r1, ROR #8 label
801 # CHECK-NEXT: 1 1 1.00 sxtb16 r0, r1
802 # CHECK-NEXT: 1 1 1.00 sxtb16 r0, r1, ror #8
1241 … 0.50 - - - - 1.00 - - - - - - sxtb16 r0, r1
1242 … - - - - 1.00 - - - - - - sxtb16 r0, r1, ror #8
|
| D | m4-int.s | 381 sxtb16 r0, r1 label
382 sxtb16 r0, r1, ROR #8 label
825 # CHECK-NEXT: 1 1 1.00 sxtb16 r0, r1
826 # CHECK-NEXT: 1 1 1.00 sxtb16 r0, r1, ror #8
1263 # CHECK-NEXT: 1.00 sxtb16 r0, r1
1264 # CHECK-NEXT: 1.00 sxtb16 r0, r1, ror #8
|
| D | cortex-a57-basic-instructions.s | 736 sxtb16 r1, r4
737 sxtb16 r6, r7
739 sxtb16 r3, r1, ror #16
1606 # CHECK-NEXT: 1 2 1.00 sxtb16 r1, r4
1607 # CHECK-NEXT: 1 2 1.00 sxtb16 r6, r7
1609 # CHECK-NEXT: 1 2 1.00 sxtb16 r3, r1, ror #16
2483 # CHECK-NEXT: - - - - 1.00 - - - sxtb16 r1, r4
2484 # CHECK-NEXT: - - - - 1.00 - - - sxtb16 r6, r7
2486 # CHECK-NEXT: - - - - 1.00 - - - sxtb16 r3, r1, ror #16
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-operand-rn-t32.cc | 61 M(sxtb16) \
|
| D | test-assembler-cond-rd-operand-rn-a32.cc | 61 M(sxtb16) \
|
| D | test-assembler-cond-rd-operand-rn-ror-amount-t32.cc | 53 M(sxtb16) \
|
| D | test-assembler-cond-rd-operand-rn-ror-amount-a32.cc | 53 M(sxtb16) \
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1975 def t2SXTB16 : T2I_ext_rrot_sxtb16<0b010, "sxtb16">;
4680 def : InstAlias<"sxtb16${p} $Rd, $Rm",
4726 def : InstAlias<"sxtb16${p} $Rd, $Rm$rot",
|