Searched refs:tegra_mc_read_32 (Results 1 – 6 of 6) sorted by relevance
72 assert(tegra_mc_read_32(MC_VIDEO_PROTECT_BASE_LO) in tegra_memctrl_restore_settings()76 assert(tegra_mc_read_32(MC_VIDEO_PROTECT_BASE_HI) in tegra_memctrl_restore_settings()80 assert(tegra_mc_read_32(MC_VIDEO_PROTECT_SIZE_MB) in tegra_memctrl_restore_settings()319 assert(tegra_mc_read_32(MC_VIDEO_PROTECT_BASE_LO) in tegra_memctrl_videomem_setup()321 assert(tegra_mc_read_32(MC_VIDEO_PROTECT_BASE_HI) in tegra_memctrl_videomem_setup()323 assert(tegra_mc_read_32(MC_VIDEO_PROTECT_SIZE_MB) in tegra_memctrl_videomem_setup()
55 (void)tegra_mc_read_32(MC_SMMU_CONFIG_0); /* read to flush writes */ in tegra_memctrl_setup()61 (void)tegra_mc_read_32(MC_SMMU_CONFIG_0); /* read to flush writes */ in tegra_memctrl_setup()
159 val = tegra_mc_read_32(MC_CLIENT_HOTRESET_CTRL0); in tegra186_memctrl_reconfig_mss_clients()171 val = tegra_mc_read_32(MC_CLIENT_HOTRESET_STATUS0); in tegra186_memctrl_reconfig_mss_clients()176 val = tegra_mc_read_32(MC_CLIENT_HOTRESET_STATUS0); in tegra186_memctrl_reconfig_mss_clients()179 val = tegra_mc_read_32(MC_CLIENT_HOTRESET_CTRL1); in tegra186_memctrl_reconfig_mss_clients()196 val = tegra_mc_read_32(MC_CLIENT_HOTRESET_STATUS1); in tegra186_memctrl_reconfig_mss_clients()201 val = tegra_mc_read_32(MC_CLIENT_HOTRESET_STATUS1); in tegra186_memctrl_reconfig_mss_clients()388 val = tegra_mc_read_32(MC_CLIENT_HOTRESET_CTRL0); in tegra186_memctrl_reconfig_mss_clients()394 val = tegra_mc_read_32(MC_CLIENT_HOTRESET_CTRL1); in tegra186_memctrl_reconfig_mss_clients()418 val = tegra_mc_read_32(MC_TXN_OVERRIDE_CONFIG_GPUSWR); in tegra186_memctrl_set_overrides()423 val = tegra_mc_read_32(MC_TXN_OVERRIDE_CONFIG_GPUSWR2); in tegra186_memctrl_set_overrides()[all …]
56 uint32_t sec_reg_ctrl = tegra_mc_read_32(MC_SECURITY_CFG_REG_CTRL_0); in plat_memctrl_tzdram_setup()
47 static inline uint32_t tegra_mc_read_32(uint32_t off) in tegra_mc_read_32() function
62 static inline uint32_t tegra_mc_read_32(uint32_t off) in tegra_mc_read_32() function