/external/llvm/test/CodeGen/AArch64/ |
D | arm64-bitfield-extract.ll | 111 ; lsr is an alias of ubfm 132 ; lsl is an alias of ubfm 154 ; lsr is an alias of ubfm 176 ; lsr is an alias of ubfm 197 ; lsl is an alias of ubfm 217 ; lsl is an alias of ubfm 246 ; lsr is an alias of ubfm 269 ; lsr is an alias of ubfm 292 ; lsr is an alias of ubfm 295 ; lsl is an alias of ubfm [all …]
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/external/llvm-project/llvm/test/MC/AArch64/ |
D | arm64-bitfield-encoding.s | 12 ubfm w1, w2, #1, #15 13 ubfm x1, x2, #1, #15
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D | basic-a64-diagnostics.s | 812 ubfm w3, w5, #32, #1 813 ubfm w7, w11, #19, #32 814 ubfm x29, x30, #64, #0 815 ubfm x10, x20, #63, #64
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D | basic-a64-instructions.s | 966 ubfm x4, x5, #12, #10 967 ubfm xzr, x4, #0, #0 968 ubfm x4, xzr, #63, #5 969 ubfm x5, x6, #12, #63
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/external/llvm/test/MC/AArch64/ |
D | arm64-bitfield-encoding.s | 12 ubfm w1, w2, #1, #15 13 ubfm x1, x2, #1, #15
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D | basic-a64-diagnostics.s | 798 ubfm w3, w5, #32, #1 799 ubfm w7, w11, #19, #32 800 ubfm x29, x30, #64, #0 801 ubfm x10, x20, #63, #64
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D | basic-a64-instructions.s | 966 ubfm x4, x5, #12, #10 967 ubfm xzr, x4, #0, #0 968 ubfm x4, xzr, #63, #5 969 ubfm x5, x6, #12, #63
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/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | arm64-bitfield-extract.ll | 201 ; lsr is an alias of ubfm 234 ; lsl is an alias of ubfm 268 ; lsr is an alias of ubfm 302 ; lsr is an alias of ubfm 334 ; lsl is an alias of ubfm 365 ; lsl is an alias of ubfm 413 ; lsr is an alias of ubfm 446 ; lsr is an alias of ubfm 482 ; lsr is an alias of ubfm 515 ; lsr is an alias of ubfm [all …]
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/external/vixl/doc/ |
D | changelog.md | 39 + MacroAssembler support for `bfm`, `ubfm` and `sbfm`.
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 750 void ubfm(const Register& rd, 831 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1); in lsl() 837 ubfm(rd, rn, shift, rd.GetSizeInBits() - 1); in lsr() 847 ubfm(rd, in ubfiz() 860 ubfm(rd, rn, lsb, lsb + width - 1); in ubfx() 864 void uxtb(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 7); } in uxtb() 867 void uxth(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 15); } in uxth() 870 void uxtw(const Register& rd, const Register& rn) { ubfm(rd, rn, 0, 31); } in uxtw()
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D | assembler-aarch64.cc | 701 void Assembler::ubfm(const Register& rd, in ubfm() function in vixl::aarch64::Assembler 5595 ubfm(rd, rn_, non_shift_bits, high_bit); in EmitExtendShift()
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D | macro-assembler-aarch64.h | 2587 ubfm(rd, rn, immr, imms); in Ubfm()
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 360 __ ubfm(w28, w29, 14, 15); in GenerateTestSequenceBase() local 361 __ ubfm(x2, x3, 1, 2); in GenerateTestSequenceBase() local
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D | test-cpu-features-aarch64.cc | 516 TEST_NONE(ubfm_0, ubfm(w0, w1, 18, 3)) 517 TEST_NONE(ubfm_1, ubfm(x0, x1, 54, 30))
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D | test-assembler-aarch64.cc | 6478 TEST(ubfm) { in TEST() argument
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/external/capstone/arch/AArch64/ |
D | AArch64MappingInsnOp.inc | 8069 { /* AArch64_UBFMWri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */ 8073 { /* AArch64_UBFMXri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 3108 void ubfm(const Register& rd,
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 1006 defm UBFM : BitfieldImm<0b10, "ubfm">;
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 1852 defm UBFM : BitfieldImm<0b10, "ubfm">;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 1689 defm UBFM : BitfieldImm<0b10, "ubfm">;
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12603 "\006uaddwt\004ubfm\005ucvtf\003udf\004udiv\005udivr\004udot\005uhadd\005" 19327 …{ 6320 /* ubfm */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, AMFBS_None, … 19328 …{ 6320 /* ubfm */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, AMFBS_None, … 26700 …{ 6320 /* ubfm */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, AMFBS_None, … 26701 …{ 6320 /* ubfm */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, AMFBS_None, …
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