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Searched refs:urb_gen5 (Results 1 – 4 of 4) sorted by relevance

/external/igt-gpu-tools/assembler/
Dbrw_eu_emit.c544 insn->bits3.urb_gen5.opcode = 1; /* FF_SYNC */ in brw_set_ff_sync_message()
545 insn->bits3.urb_gen5.offset = 0; /* Not used by FF_SYNC */ in brw_set_ff_sync_message()
546 insn->bits3.urb_gen5.swizzle_control = 0; /* Not used by FF_SYNC */ in brw_set_ff_sync_message()
547 insn->bits3.urb_gen5.allocate = allocate; in brw_set_ff_sync_message()
548 insn->bits3.urb_gen5.used = 0; /* Not used by FF_SYNC */ in brw_set_ff_sync_message()
549 insn->bits3.urb_gen5.complete = 0; /* Not used by FF_SYNC */ in brw_set_ff_sync_message()
577 insn->bits3.urb_gen5.opcode = 0; /* URB_WRITE */ in brw_set_urb_message()
578 insn->bits3.urb_gen5.offset = offset; in brw_set_urb_message()
579 insn->bits3.urb_gen5.swizzle_control = swizzle_control; in brw_set_urb_message()
580 insn->bits3.urb_gen5.allocate = allocate; in brw_set_urb_message()
[all …]
Dgram.y1827 GEN(&$$)->bits3.urb_gen5.offset = $2;
1828 GEN(&$$)->bits3.urb_gen5.swizzle_control = $3;
1829 GEN(&$$)->bits3.urb_gen5.pad = 0;
1830 GEN(&$$)->bits3.urb_gen5.allocate = $4;
1831 GEN(&$$)->bits3.urb_gen5.used = $5;
1832 GEN(&$$)->bits3.urb_gen5.complete = $6;
Dbrw_structs.h1290 } urb_gen5; member
Dbrw_disasm.c1262 format (file, " %d", inst->bits3.urb_gen5.offset); in brw_disasm()
1270 inst->bits3.urb_gen5.opcode, &space); in brw_disasm()