/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | expressions-gfx10.s | 10 v_bfe_u32 v0, i1+100, v1, v2 label 13 v_bfe_u32 v0, v1, i1-100, v2 label 16 v_bfe_u32 v0, v1, v2, (i1+100)*2 label 32 v_bfe_u32 v0, u, v1, v2 label 36 v_bfe_u32 v0, v1, u-1, v2 label 40 v_bfe_u32 v0, v1, v2, u+1 label 66 v_bfe_u32 v0, v2, 123, u label 69 v_bfe_u32 v0, v2, u, u label 72 v_bfe_u32 v0, v2, u, u1 label
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D | vop3-literal.s | 6 v_bfe_u32 v0, 0x3039, v1, s1 label 10 v_bfe_u32 v0, v1, 0x3039, s1 label 14 v_bfe_u32 v0, v1, s1, 0x3039 label 18 v_bfe_u32 v0, 0x3039, 0x3039, s1 label 22 v_bfe_u32 v0, 0x3039, s1, 0x3039 label 26 v_bfe_u32 v0, v1, 0x3039, 0x3039 label 30 v_bfe_u32 v0, 0x3039, 0x3039, 0x3039 label 34 v_bfe_u32 v0, 0x3039, s1, 0x3038 label 38 v_bfe_u32 v0, 0x3039, v1, v2 label 42 v_bfe_u32 v0, 0x3039, 0x12345, v2 label [all …]
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D | gfx9_err_pos.s | 140 v_bfe_u32 v0, v2, v3, undef label 145 v_bfe_u32 v0, v2, undef, v3 label
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D | gfx10_err_pos.s | 53 v_bfe_u32 v0, 1+(100, v1, v2 label 657 v_bfe_u32 v0, s1, 0x3039, s2 label 662 v_bfe_u32 v0, s1, s2, s3 label 862 v_bfe_u32 v0, v2, 123, undef label 867 v_bfe_u32 v0, v2, undef, 123 label
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D | expressions-gfx9.s | 25 v_bfe_u32 v0, v2, v3, u label
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D | gfx10-constant-bus.s | 62 v_bfe_u32 v5, s1, s2, null label
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | extract-lowbits.ll | 23 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1 35 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1 48 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1 64 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1 76 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1 89 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1 105 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1 142 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1 158 ; GCN-NEXT: v_bfe_u32 v0, v0, 0, v1
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D | extract-load-i1.ll | 15 ; CHECK-NEXT: v_bfe_u32 v2, v0, 1, 1 16 ; CHECK-NEXT: v_bfe_u32 v3, v0, 2, 2 17 ; CHECK-NEXT: v_bfe_u32 v4, v0, 3, 1 19 ; CHECK-NEXT: v_bfe_u32 v6, v0, 5, 1
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D | gfx10-vop-literal.ll | 38 ; GFX10: v_bfe_u32 v{{[0-9]+}}, 0x3039, s{{[0-9]+}}, [[C1]] 41 ; GFX9: v_bfe_u32 v{{[0-9]+}}, [[C1]], v{{[0-9]+}}, [[C2]] 50 ; GFX10: v_bfe_u32 v{{[0-9]+}}, [[C1]], v{{[0-9]+}}, 0xddd5 53 ; GFX9: v_bfe_u32 v{{[0-9]+}}, [[C1]], v{{[0-9]+}}, [[C2]]
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D | callee-special-input-vgprs.ll | 19 ; VARABI: v_bfe_u32 [[ID:v[0-9]+]], v0, 10, 10 20 ; FIXEDABI: v_bfe_u32 [[ID:v[0-9]+]], v31, 10, 10 32 ; VARABI: v_bfe_u32 [[ID:v[0-9]+]], v0, 20, 10 33 ; FIXEDABI: v_bfe_u32 [[ID:v[0-9]+]], v31, 20, 10 46 ; VARABI-DAG: v_bfe_u32 [[IDY:v[0-9]+]], v0, 10, 10 49 ; FIXEDABI-DAG: v_bfe_u32 [[IDY:v[0-9]+]], v31, 10, 10 67 ; VARABI-DAG: v_bfe_u32 [[IDY:v[0-9]+]], v0, 10, 10 68 ; VARABI-DAG: v_bfe_u32 [[IDZ:v[0-9]+]], v0, 20, 10 71 ; FIXEDABI-DAG: v_bfe_u32 [[IDY:v[0-9]+]], v31, 10, 10 72 ; FIXEDABI-DAG: v_bfe_u32 [[IDZ:v[0-9]+]], v31, 20, 10 [all …]
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D | shift-and-i64-ubfe.ll | 43 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 1 59 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 20, 1 93 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 1{{$}} 109 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 20, 2 125 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 30 177 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 2 212 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 30 261 ; GCN: v_bfe_u32 [[BFE:v[0-9]+]], [[VAL]], 3, 1{{$}} 277 ; GCN: v_bfe_u32 [[BFE:v[0-9]+]], [[VAL]], 1, 1{{$}} 356 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 2, 3 [all …]
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D | bfe-combine.ll | 6 ; VI: v_bfe_u32 v[[BFE:[0-9]+]], v{{[0-9]+}}, 8, 8 27 ; VI: v_bfe_u32 v[[BFE:[0-9]+]], v{{[0-9]+}}, 16, 16
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D | llvm.amdgcn.ubfe.ll | 14 ; SI-NEXT: v_bfe_u32 v0, v0, s3, s3 26 ; VI-NEXT: v_bfe_u32 v0, v0, s1, s1 44 ; SI-NEXT: v_bfe_u32 v0, s2, v1, v0 57 ; VI-NEXT: v_bfe_u32 v0, s0, v0, v1 75 ; SI-NEXT: v_bfe_u32 v0, s2, v0, v1 88 ; VI-NEXT: v_bfe_u32 v0, s0, v0, v1 107 ; SI-NEXT: v_bfe_u32 v0, s0, v0, v1 121 ; VI-NEXT: v_bfe_u32 v0, s2, v0, v1 330 ; SI-NEXT: v_bfe_u32 v0, v0, 1, 8 350 ; VI-NEXT: v_bfe_u32 v0, v0, 1, 8 [all …]
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D | store-weird-sizes.ll | 71 ; FIJI-NEXT: v_bfe_u32 v0, v0, 16, 7 222 ; CIVI-NEXT: v_bfe_u32 v1, v1, 16, 1
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D | ftrunc.f64.ll | 14 ; SI: v_bfe_u32 {{v[0-9]+}}, {{v[0-9]+}}, 20, 11
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D | shift-and-i128-ubfe.ll | 99 ; GCN-DAG: v_bfe_u32 v[[ELT2PART:[0-9]+]], v[[VAL3]], 2, 2{{$}}
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | vop3-literal.txt | 3 # GFX10: v_bfe_u32 v0, 0x3039, v1, s1 ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x06,0x00,0x39,… 6 # GFX10: v_bfe_u32 v0, v1, 0x3039, s1 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xff,0x05,0x00,0x39,… 9 # GFX10: v_bfe_u32 v0, v1, s1, 0x3039 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0x03,0xfc,0x03,0x39,… 12 # GFX10: v_bfe_u32 v0, 0x3039, v1, v2 ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x0a,0x04,0x39,… 15 # GFX10: v_bfe_u32 v0, s1, 0x3039, s1 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xfe,0x05,0x00,0x39,…
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/external/llvm/test/CodeGen/AMDGPU/ |
D | shift-and-i64-ubfe.ll | 41 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 1 57 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 20, 1 89 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 1{{$}} 105 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 20, 2 121 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 30 171 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 2 204 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 30 253 ; GCN: v_bfe_u32 [[BFE:v[0-9]+]], [[VAL]], 3, 1{{$}} 269 ; GCN: v_bfe_u32 [[BFE:v[0-9]+]], [[VAL]], 1, 1{{$}} 345 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 2, 3 [all …]
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D | llvm.AMDGPU.bfe.u32.ll | 8 ; SI: v_bfe_u32 17 ; SI: v_bfe_u32 26 ; SI: v_bfe_u32 35 ; SI: v_bfe_u32 560 ; XXX: The operand to v_bfe_u32 could also just directly be the load register. 564 ; SI: v_bfe_u32 [[BFE:v[0-9]+]], [[AND]], 2, 2 590 ; SI: v_bfe_u32 {{v[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}, 3
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D | llvm.round.f64.ll | 16 ; SI-DAG: v_bfe_u32 [[EXP:v[0-9]+]], v{{[0-9]+}}, 20, 11
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D | ftrunc.f64.ll | 14 ; SI: v_bfe_u32 {{v[0-9]+}}, {{v[0-9]+}}, 20, 11
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D | frem.ll | 70 ; SI: v_bfe_u32
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D | shift-and-i128-ubfe.ll | 97 ; GCN-DAG: v_bfe_u32 v[[ELT2PART:[0-9]+]], v[[VAL3]], 2, 2{{$}}
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/external/mesa3d/src/gallium/drivers/radeonsi/glsl_tests/ |
D | bitfield_extract.glsl | 25 ; GCN-NEXT: v_bfe_u32
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
D | frem.ll | 557 ; CI-NEXT: v_bfe_u32 v0, v0, 0, 16 562 ; CI-NEXT: v_bfe_u32 v1, v1, 0, 16 695 ; CI-NEXT: v_bfe_u32 v1, v1, 0, 16 696 ; CI-NEXT: v_bfe_u32 v0, v0, 0, 16 699 ; CI-NEXT: v_bfe_u32 v1, v2, 0, 16 704 ; CI-NEXT: v_bfe_u32 v2, v3, 0, 16
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