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Searched refs:v_pk_mul_lo_u16 (Results 1 – 18 of 18) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dmul.i16.ll53 ; GFX9-NEXT: v_pk_mul_lo_u16 v0, v0, v1
71 ; GFX9-NEXT: v_pk_mul_lo_u16
72 ; GFX9-NEXT: v_pk_mul_lo_u16
93 ; GFX9-NEXT: v_pk_mul_lo_u16 v0, v0, v2
94 ; GFX9-NEXT: v_pk_mul_lo_u16 v1, v1, v3
Dimmv216.ll521 ; GFX9: v_pk_mul_lo_u16 v0, v0, [[K]]
523 ; GFX10: v_pk_mul_lo_u16 v0, 0x3800, v0 op_sel_hi:[0,1] ; encoding: [0x{{[0-9a-f]+}},0x{{[0-9a-f]+}…
531 ; GFX9: v_pk_mul_lo_u16 v0, v0, [[K]]
533 ; GFX10: v_pk_mul_lo_u16 v0, 0xb800, v0 op_sel_hi:[0,1] ; encoding: [0x{{[0-9a-f]+}},0x{{[0-9a-f]+}…
541 ; GFX9: v_pk_mul_lo_u16 v0, v0, [[K]]
543 ; GFX10: v_pk_mul_lo_u16 v0, 0x3c00, v0 op_sel_hi:[0,1] ; encoding: [0x{{[0-9a-f]+}},0x{{[0-9a-f]+}…
551 ; GFX9: v_pk_mul_lo_u16 v0, v0, [[K]]
553 ; GFX10: v_pk_mul_lo_u16 v0, 0xbc00, v0 op_sel_hi:[0,1] ; encoding: [0x{{[0-9a-f]+}},0x{{[0-9a-f]+}…
581 ; GFX9: v_pk_mul_lo_u16 v0, v0, [[K]]
583 ; GFX10: v_pk_mul_lo_u16 v0, 0x4400, v0 op_sel_hi:[0,1] ; encoding: [0x{{[0-9a-f]+}},0x{{[0-9a-f]+}…
[all …]
Dsdwa-peephole.ll85 ; GFX9_10: v_pk_mul_lo_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
111 ; GFX9_10-DAG: v_pk_mul_lo_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
112 ; GFX9_10-DAG: v_pk_mul_lo_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
144 ; GFX9_10-DAG: v_pk_mul_lo_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
145 ; GFX9_10-DAG: v_pk_mul_lo_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
146 ; GFX9_10-DAG: v_pk_mul_lo_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
147 ; GFX9_10-DAG: v_pk_mul_lo_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
420 ; GFX9: v_pk_mul_lo_u16 v{{[0-9]+}}, v{{[0-9]+}}, s[[IMM]]
422 ; GFX10: v_pk_mul_lo_u16 v{{[0-9]+}}, 0x141007b, v{{[0-9]+}}
443 ; GFX9_10: v_pk_mul_lo_u16 v[[DST1:[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}}
[all …]
Didot4s.ll962 ; GFX9-NODL-NEXT: v_pk_mul_lo_u16 v3, v3, v4
968 ; GFX9-NODL-NEXT: v_pk_mul_lo_u16 v1, v1, v2
1001 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v4
1007 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v1, v1, v2
1044 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v4
1047 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v4
Didot8s.ll1749 ; GFX9-NEXT: v_pk_mul_lo_u16 v1, v1, v5
1757 ; GFX9-NEXT: v_pk_mul_lo_u16 v2, v2, v6
1762 ; GFX9-NEXT: v_pk_mul_lo_u16 v3, v3, v7
1765 ; GFX9-NEXT: v_pk_mul_lo_u16 v4, v4, v8
1821 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v1, v1, v5
1829 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v6
1834 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v7
1837 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v8
1890 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v3
1897 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v4
[all …]
Didot8u.ll2300 ; GFX9-NEXT: v_pk_mul_lo_u16 v1, s3, v1
2319 ; GFX9-NEXT: v_pk_mul_lo_u16 v4, s2, v4
2320 ; GFX9-NEXT: v_pk_mul_lo_u16 v2, s4, v2
2322 ; GFX9-NEXT: v_pk_mul_lo_u16 v3, s4, v3
2360 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v1, s3, v1
2379 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v4, s2, v4
2380 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v2, s4, v2
2382 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v3, s4, v3
2418 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v2, s2, s3
2425 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, s2, s6
[all …]
Didot4u.ll1841 ; GFX9-NODL-NEXT: v_pk_mul_lo_u16 v4, v5, v4
1848 ; GFX9-NODL-NEXT: v_pk_mul_lo_u16 v1, v1, v2
1876 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v4, v5, v4
1883 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v1, v1, v2
1916 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v4
1919 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v4
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dmul.v2i16.ll9 ; GFX9-NEXT: v_pk_mul_lo_u16 v0, v0, v1
27 ; GFX9-NEXT: v_pk_mul_lo_u16 v0, v0, v1 neg_lo:[1,0] neg_hi:[1,0]
48 ; GFX9-NEXT: v_pk_mul_lo_u16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1]
69 ; GFX9-NEXT: v_pk_mul_lo_u16 v0, v0, v1 neg_lo:[1,1] neg_hi:[1,1]
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dlds_direct_gfx9.txt15 # GFX9: v_pk_mul_lo_u16 v0, src_lds_direct, v0 ; encoding: [0x00,0x00,0x81,0xd3,0xfe,0x00,0x02,0x18]
Dgfx9_dasm_all.txt49587 # CHECK: v_pk_mul_lo_u16 v5, v1, v2 ; encoding: [0x05,0x00,0x81,0xd3,0x01,0x05,0x02,0x…
49590 # CHECK: v_pk_mul_lo_u16 v255, v1, v2 ; encoding: [0xff,0x00,0x81,0xd3,0x01,0x05,0x02,0x…
49593 # CHECK: v_pk_mul_lo_u16 v5, v255, v2 ; encoding: [0x05,0x00,0x81,0xd3,0xff,0x05,0x02,0x…
49596 # CHECK: v_pk_mul_lo_u16 v5, s1, v2 ; encoding: [0x05,0x00,0x81,0xd3,0x01,0x04,0x02,0x…
49599 # CHECK: v_pk_mul_lo_u16 v5, s101, v2 ; encoding: [0x05,0x00,0x81,0xd3,0x65,0x04,0x02,0x…
49602 # CHECK: v_pk_mul_lo_u16 v5, flat_scratch_lo, v2 ; encoding: [0x05,0x00,0x81,0xd3,0x66,0x04,0x02,0x…
49605 # CHECK: v_pk_mul_lo_u16 v5, flat_scratch_hi, v2 ; encoding: [0x05,0x00,0x81,0xd3,0x67,0x04,0x02,0x…
49608 # CHECK: v_pk_mul_lo_u16 v5, vcc_lo, v2 ; encoding: [0x05,0x00,0x81,0xd3,0x6a,0x04,0x02,0x…
49611 # CHECK: v_pk_mul_lo_u16 v5, vcc_hi, v2 ; encoding: [0x05,0x00,0x81,0xd3,0x6b,0x04,0x02,0x…
49614 # CHECK: v_pk_mul_lo_u16 v5, m0, v2 ; encoding: [0x05,0x00,0x81,0xd3,0x7c,0x04,0x02,0x…
[all …]
/external/llvm-project/llvm/test/MC/AMDGPU/
Dvop3p.s122 v_pk_mul_lo_u16 v0, v1, v2 label
Dgfx8_unsupported.s1552 v_pk_mul_lo_u16 v0, v1, v2 label
Dgfx9_asm_all.s50510 v_pk_mul_lo_u16 v5, v1, v2 label
50513 v_pk_mul_lo_u16 v255, v1, v2 label
50516 v_pk_mul_lo_u16 v5, v255, v2 label
50519 v_pk_mul_lo_u16 v5, s1, v2 label
50522 v_pk_mul_lo_u16 v5, s101, v2 label
50525 v_pk_mul_lo_u16 v5, flat_scratch_lo, v2 label
50528 v_pk_mul_lo_u16 v5, flat_scratch_hi, v2 label
50531 v_pk_mul_lo_u16 v5, vcc_lo, v2 label
50534 v_pk_mul_lo_u16 v5, vcc_hi, v2 label
50537 v_pk_mul_lo_u16 v5, m0, v2 label
[all …]
Dgfx7_unsupported.s2218 v_pk_mul_lo_u16 v0, v1, v2 label
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DVOP3PInstructions.td57 def V_PK_MUL_LO_U16 : VOP3PInst<"v_pk_mul_lo_u16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, mul>;
/external/llvm-project/llvm/lib/Target/AMDGPU/
DVOP3PInstructions.td64 def V_PK_MUL_LO_U16 : VOP3PInst<"v_pk_mul_lo_u16", VOP3_Profile<VOP_V2I16_V2I16_V2I16>, mul>;
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX9.rst1682 …v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_6>`, …
DAMDGPUAsmGFX10.rst1942 …v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_synid10_src32_3>`…