| /external/mesa3d/src/intel/vulkan/ |
| D | anv_nir_lower_multiview.c | 43 uint32_t view_mask; member
65 nir_imm_int(b, util_bitcount(state->view_mask))); in build_instance_id()
79 assert(state->view_mask != 0); in build_view_index()
80 if (util_bitcount(state->view_mask) == 1) { in build_view_index()
82 state->view_index = nir_imm_int(b, ffs(state->view_mask) - 1); in build_view_index()
85 assert((state->view_mask & 0xffff0000) == 0); in build_view_index()
93 nir_imm_int(b, util_bitcount(state->view_mask))); in build_view_index()
95 if (util_is_power_of_two_or_zero(state->view_mask + 1)) { in build_view_index()
105 for_each_bit(bit, state->view_mask) { in build_view_index()
158 uint32_t view_mask = pipeline->subpass->view_mask; in anv_nir_lower_multiview() local
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| D | anv_pass.c | 301 subpass->view_mask = 0; in anv_CreateRenderPass()
379 pass->subpasses[i].view_mask = mv->pViewMasks[i]; in anv_CreateRenderPass()
542 subpass->view_mask = desc->viewMask; in anv_CreateRenderPass2()
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| D | genX_query.c | 1098 if (cmd_buffer->state.subpass && cmd_buffer->state.subpass->view_mask) { in genX()
1100 util_bitcount(cmd_buffer->state.subpass->view_mask); in genX()
1155 if (cmd_buffer->state.subpass && cmd_buffer->state.subpass->view_mask) { in genX()
1157 util_bitcount(cmd_buffer->state.subpass->view_mask); in genX()
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| D | anv_pipeline.c | 656 _mesa_sha1_update(&ctx, &pipeline->subpass->view_mask, in anv_pipeline_hash_graphics()
657 sizeof(pipeline->subpass->view_mask)); in anv_pipeline_hash_graphics()
1489 pipeline->subpass->view_mask != 0) { in anv_pipeline_compile_graphics()
2232 if (pipeline->subpass->view_mask && !pipeline->use_primitive_replication) { in anv_graphics_pipeline_init()
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| D | anv_blorp.c | 1396 if (subpass->view_mask) { in clear_color_attachment()
1398 for_each_bit(view_idx, subpass->view_mask) { in clear_color_attachment()
1464 if (subpass->view_mask) { in clear_depth_stencil_attachment()
1466 for_each_bit(view_idx, subpass->view_mask) { in clear_depth_stencil_attachment()
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| D | genX_pipeline.c | 2208 uint32_t view_mask = pipeline->subpass->view_mask; local
2209 int view_count = util_bitcount(view_mask);
2217 for_each_bit(view_index, view_mask) {
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| D | anv_private.h | 4369 uint32_t view_mask; member
4381 return MAX2(1, util_bitcount(subpass->view_mask)); in anv_subpass_view_count()
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| D | genX_cmd_buffer.c | 5182 return cmd_state->subpass->view_mask & att_state->pending_clear_views; in get_multiview_subpass_clear_mask()
5189 if (!cmd_state->subpass->view_mask) in do_first_layer_clear()
5248 bool is_multiview = subpass->view_mask != 0; in cmd_buffer_begin_subpass()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_meta_clear.c | 399 uint32_t view_mask) in emit_color_clear() argument
493 if (view_mask) { in emit_color_clear()
495 for_each_bit(i, view_mask) in emit_color_clear()
810 uint32_t view_mask) in emit_depthstencil_clear() argument
898 if (view_mask) { in emit_depthstencil_clear()
900 for_each_bit(i, view_mask) in emit_depthstencil_clear()
1088 uint32_t view_mask) in radv_can_fast_clear_depth() argument
1104 if (view_mask && (iview->image->info.array_size >= 32 || in radv_can_fast_clear_depth()
1105 (1u << iview->image->info.array_size) - 1u != view_mask)) in radv_can_fast_clear_depth()
1107 if (!view_mask && clear_rect->baseArrayLayer != 0) in radv_can_fast_clear_depth()
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| D | radv_meta_resolve_cs.c | 902 if (subpass->view_mask) in radv_cmd_buffer_resolve_subpass_cs()
903 layer_count = util_last_bit(subpass->view_mask); in radv_cmd_buffer_resolve_subpass_cs()
967 if (subpass->view_mask) in radv_depth_stencil_resolve_subpass_cs()
968 layer_count = util_last_bit(subpass->view_mask); in radv_depth_stencil_resolve_subpass_cs()
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| D | radv_pass.c | 400 subpass->view_mask = multiview_info->pViewMasks[i]; in radv_CreateRenderPass()
581 subpass->view_mask = desc->viewMask; in radv_CreateRenderPass2()
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| D | radv_meta_resolve.c | 913 if (subpass->view_mask) in radv_decompress_resolve_subpass_src()
914 layer_count = util_last_bit(subpass->view_mask); in radv_decompress_resolve_subpass_src()
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| D | radv_query.c | 1864 if (cmd_buffer->state.subpass && cmd_buffer->state.subpass->view_mask) { in radv_CmdEndQueryIndexedEXT()
1868 for (unsigned i = 1; i < util_bitcount(cmd_buffer->state.subpass->view_mask); i++) { in radv_CmdEndQueryIndexedEXT()
1903 if (cmd_buffer->state.subpass && cmd_buffer->state.subpass->view_mask) in radv_CmdWriteTimestamp()
1904 num_queries = util_bitcount(cmd_buffer->state.subpass->view_mask); in radv_CmdWriteTimestamp()
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| D | radv_cmd_buffer.c | 3419 if (cmd_buffer->state.subpass->view_mask) { in radv_handle_subpass_image_transition()
3427 range.layerCount = util_last_bit(cmd_buffer->state.subpass->view_mask); in radv_handle_subpass_image_transition()
5160 if (!state->subpass->view_mask) { in radv_emit_draw_packets()
5168 for_each_bit(i, state->subpass->view_mask) { in radv_emit_draw_packets()
5213 if (!state->subpass->view_mask) { in radv_emit_draw_packets()
5219 for_each_bit(i, state->subpass->view_mask) { in radv_emit_draw_packets()
5228 if (!state->subpass->view_mask) { in radv_emit_draw_packets()
5234 for_each_bit(i, state->subpass->view_mask) { in radv_emit_draw_packets()
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| D | radv_private.h | 2289 uint32_t view_mask; member
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| D | radv_pipeline.c | 2443 key.has_multiview_view_index = !!subpass->view_mask; in radv_generate_graphics_pipeline_key()
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_lower_multiview.c | 210 nir_lower_multiview(nir_shader *shader, uint32_t view_mask) in nir_lower_multiview() argument
213 int view_count = util_bitcount(view_mask); in nir_lower_multiview()
253 uint32_t view_mask_temp = view_mask; in nir_lower_multiview()
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| D | nir.h | 5000 bool nir_lower_multiview(nir_shader *shader, uint32_t view_mask);
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| /external/mesa3d/docs/relnotes/ |
| D | 19.1.0.rst | 4244 - radv: remove unused radv_render_pass_attachment::view_mask
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