| /external/llvm-project/llvm/test/MC/ARM/ |
| D | vldm-vstm-diags.s | 5 vldm s0, {s1, s2}
15 vldm r0, {r1, r2}
21 vldm r0, #42
27 vldm r0, {s1, d2}
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| /external/llvm/test/CodeGen/ARM/ |
| D | 2012-09-25-InlineAsmScalarToVectorConv.ll | 7 …%1 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } asm "vldm $4, { ${0:q}, ${1:q}, ${2:q}, $…
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| D | swift-vldm.ll | 4 ; Check that we avoid producing vldm instructions using d registers that
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | 2012-09-25-InlineAsmScalarToVectorConv.ll | 7 …%1 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } asm "vldm $4, { ${0:q}, ${1:q}, ${2:q}, $…
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| D | vldm-liveness.ll | 5 ; See vldm-liveness.mir for the bug this file originally testing.
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| D | swift-vldm.ll | 4 ; Check that we avoid producing vldm instructions using d registers that
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| D | vldm-sched-a9.ll | 11 ; I think more vldm should be generated, initial ones are used to load some
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| /external/libvpx/libvpx/vpx_dsp/arm/ |
| D | save_reg_neon.asm | 28 vldm r0!, {d8-d15}
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| /external/libvpx/config/arm-neon/vpx_dsp/arm/ |
| D | save_reg_neon.asm.S | 36 vldm r0!, {d8-d15}
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 4589 void vldm(Condition cond,
4594 void vldm(DataType dt, in vldm() function
4598 vldm(al, dt, rn, write_back, dreglist); in vldm()
4600 void vldm(Register rn, WriteBack write_back, DRegisterList dreglist) { in vldm() function
4601 vldm(al, kDataTypeValueNone, rn, write_back, dreglist); in vldm()
4603 void vldm(Condition cond, in vldm() function
4607 vldm(cond, kDataTypeValueNone, rn, write_back, dreglist); in vldm()
4610 void vldm(Condition cond,
4615 void vldm(DataType dt, in vldm() function
4619 vldm(al, dt, rn, write_back, sreglist); in vldm()
[all …]
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| D | disasm-aarch32.h | 1871 void vldm(Condition cond,
1877 void vldm(Condition cond,
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| D | disasm-aarch32.cc | 4944 void Disassembler::vldm(Condition cond, in vldm() function in vixl::aarch32::Disassembler
4954 void Disassembler::vldm(Condition cond, in vldm() function in vixl::aarch32::Disassembler
22807 vldm(CurrentCond(), in DecodeT32()
22847 vldm(CurrentCond(), in DecodeT32()
64987 vldm(condition, in DecodeA32()
65034 vldm(condition, in DecodeA32()
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| D | assembler-aarch32.cc | 19364 void Assembler::vldm(Condition cond, in vldm() function in vixl::aarch32::Assembler
19397 Delegate(kVldm, &Assembler::vldm, cond, dt, rn, write_back, dreglist); in vldm()
19400 void Assembler::vldm(Condition cond, in vldm() function in vixl::aarch32::Assembler
19431 Delegate(kVldm, &Assembler::vldm, cond, dt, rn, write_back, sreglist); in vldm()
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| D | macro-assembler-aarch32.h | 7168 vldm(cond, dt, rn, write_back, dreglist); in Vldm()
7197 vldm(cond, dt, rn, write_back, sreglist); in Vldm()
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| /external/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 2020 MUST_FAIL_TEST_BOTH(vldm(pc, WRITE_BACK, SRegisterList(s0)), in TEST()
2022 MUST_FAIL_TEST_T32(vldm(pc, NO_WRITE_BACK, SRegisterList(s0)), in TEST()
2031 MUST_FAIL_TEST_BOTH(vldm(pc, WRITE_BACK, DRegisterList(d0)), in TEST()
2033 MUST_FAIL_TEST_T32(vldm(pc, NO_WRITE_BACK, DRegisterList(d0)), in TEST()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 215 defm VLDM : vfp_ldst_mult<"vldm", 1, IIC_fpLoad_m, IIC_fpLoad_mu>;
222 def : MnemonicAlias<"vldm", "vldmia">;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 266 defm VLDM : vfp_ldst_mult<"vldm", 1, IIC_fpLoad_m, IIC_fpLoad_mu>;
273 def : MnemonicAlias<"vldm", "vldmia">;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 302 defm VLDM : vfp_ldst_mult<"vldm", 1, IIC_fpLoad_m, IIC_fpLoad_mu>;
309 def : MnemonicAlias<"vldm", "vldmia">;
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 787 Mnemonic = "vldmia"; // "vldm"
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