1 // Auto-generated file. Do not edit!
2 // Template: src/f32-vmulcaddc/neon.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/math.h>
15 #include <xnnpack/vmulcaddc.h>
16
17
xnn_f32_vmulcaddc_minmax_ukernel_c4__neon_2x(size_t rows,size_t channels,const float * restrict input,size_t input_stride,const float * restrict weights,float * restrict output,size_t output_stride,const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_vmulcaddc_minmax_ukernel_c4__neon_2x(
19 size_t rows,
20 size_t channels,
21 const float*restrict input,
22 size_t input_stride,
23 const float*restrict weights,
24 float*restrict output,
25 size_t output_stride,
26 const union xnn_f32_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN
27 {
28 assert(rows != 0);
29 assert(channels != 0);
30 assert(channels % sizeof(float) == 0);
31
32 const float* i0 = input;
33 float* o0 = output;
34 const float* i1 = (const float*) ((uintptr_t) i0 + input_stride);
35 float* o1 = (float*) ((uintptr_t) o0 + output_stride);
36 if XNN_UNPREDICTABLE(rows < 2) {
37 i1 = i0;
38 o1 = o0;
39 }
40
41 const size_t input_increment = input_stride * 2 - channels;
42 const size_t output_increment = output_stride * 2 - channels;
43
44 const float32x4_t vmin = vld1q_dup_f32(¶ms->scalar.min);
45 const float32x4_t vmax = vld1q_dup_f32(¶ms->scalar.max);
46 do {
47 const float* w = weights;
48 size_t c = channels;
49 for (; c >= 4 * sizeof(float); c -= 4 * sizeof(float)) {
50 const float32x4_t vscale0123 = vld1q_f32(w); w += 4;
51
52 float32x4_t vacc0x0123 = vld1q_f32(i0); i0 += 4;
53 float32x4_t vacc1x0123 = vld1q_f32(i1); i1 += 4;
54
55 vacc0x0123 = vmulq_f32(vacc0x0123, vscale0123);
56 vacc1x0123 = vmulq_f32(vacc1x0123, vscale0123);
57
58 const float32x4_t vbias0123 = vld1q_f32(w); w += 4;
59
60 vacc0x0123 = vaddq_f32(vacc0x0123, vbias0123);
61 vacc1x0123 = vaddq_f32(vacc1x0123, vbias0123);
62
63 vacc0x0123 = vmaxq_f32(vacc0x0123, vmin);
64 vacc1x0123 = vmaxq_f32(vacc1x0123, vmin);
65
66 vacc0x0123 = vminq_f32(vacc0x0123, vmax);
67 vacc1x0123 = vminq_f32(vacc1x0123, vmax);
68
69 vst1q_f32(o0, vacc0x0123); o0 += 4;
70 vst1q_f32(o1, vacc1x0123); o1 += 4;
71 }
72 if XNN_UNLIKELY(c != 0) {
73 const float32x4_t vscale0123 = vld1q_f32(w);
74
75 float32x4_t vacc0x0123 = vld1q_f32(i0); i0 = (const float*) ((uintptr_t) i0 + c);
76 float32x4_t vacc1x0123 = vld1q_f32(i1); i1 = (const float*) ((uintptr_t) i1 + c);
77
78 vacc0x0123 = vmulq_f32(vacc0x0123, vscale0123);
79 vacc1x0123 = vmulq_f32(vacc1x0123, vscale0123);
80
81 const float32x4_t vbias0123 = vld1q_f32(w + 4);
82
83 vacc0x0123 = vaddq_f32(vacc0x0123, vbias0123);
84 vacc1x0123 = vaddq_f32(vacc1x0123, vbias0123);
85
86 vacc0x0123 = vmaxq_f32(vacc0x0123, vmin);
87 vacc1x0123 = vmaxq_f32(vacc1x0123, vmin);
88
89 vacc0x0123 = vminq_f32(vacc0x0123, vmax);
90 vacc1x0123 = vminq_f32(vacc1x0123, vmax);
91
92 float32x2_t vacc0x01 = vget_low_f32(vacc0x0123);
93 float32x2_t vacc1x01 = vget_low_f32(vacc1x0123);
94 if (c & (2 * sizeof(float))) {
95 vst1_f32(o0, vacc0x01); o0 += 2;
96 vst1_f32(o1, vacc1x01); o1 += 2;
97
98 vacc0x01 = vget_high_f32(vacc0x0123);
99 vacc1x01 = vget_high_f32(vacc1x0123);
100 }
101 if (c & (1 * sizeof(float))) {
102 vst1_lane_f32(o0, vacc0x01, 0); o0 += 1;
103 vst1_lane_f32(o1, vacc1x01, 0); o1 += 1;
104 }
105 }
106 i0 = (const float*) ((uintptr_t) i0 + input_increment);
107 o0 = (float*) ((uintptr_t) o0 + output_increment);
108 i1 = (const float*) ((uintptr_t) i1 + input_increment);
109 o1 = (float*) ((uintptr_t) o1 + output_increment);
110 if XNN_UNPREDICTABLE(rows < 4) {
111 i1 = i0;
112 o1 = o0;
113 }
114 rows = doz(rows, 2);
115 } while (rows != 0);
116 }
117