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1# Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
2#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
6# RD-N2 platform uses GIC-Clayton which is based on GICv4.1
7GIC_ENABLE_V4_EXTN	:=	1
8
9include plat/arm/css/sgi/sgi-common.mk
10
11RDN2_BASE		=	plat/arm/board/rdn2
12
13PLAT_INCLUDES		+=	-I${RDN2_BASE}/include/
14
15SGI_CPU_SOURCES		:=	lib/cpus/aarch64/neoverse_n2.S
16
17PLAT_BL_COMMON_SOURCES	+=	${CSS_ENT_BASE}/sgi_plat_v2.c
18
19BL1_SOURCES		+=	${SGI_CPU_SOURCES}			\
20				${RDN2_BASE}/rdn2_err.c
21
22BL2_SOURCES		+=	${RDN2_BASE}/rdn2_plat.c		\
23				${RDN2_BASE}/rdn2_security.c		\
24				${RDN2_BASE}/rdn2_err.c			\
25				lib/utils/mem_region.c			\
26				drivers/arm/tzc/tzc400.c		\
27				plat/arm/common/arm_tzc400.c		\
28				plat/arm/common/arm_nor_psci_mem_protect.c
29
30BL31_SOURCES		+=	${SGI_CPU_SOURCES}			\
31				${RDN2_BASE}/rdn2_plat.c		\
32				${RDN2_BASE}/rdn2_topology.c		\
33				drivers/cfi/v2m/v2m_flash.c		\
34				lib/utils/mem_region.c			\
35				plat/arm/common/arm_nor_psci_mem_protect.c
36
37ifeq (${TRUSTED_BOARD_BOOT}, 1)
38BL1_SOURCES		+=	${RDN2_BASE}/rdn2_trusted_boot.c
39BL2_SOURCES		+=	${RDN2_BASE}/rdn2_trusted_boot.c
40endif
41
42# Add the FDT_SOURCES and options for Dynamic Config
43FDT_SOURCES		+=	${RDN2_BASE}/fdts/${PLAT}_fw_config.dts	\
44				${RDN2_BASE}/fdts/${PLAT}_tb_fw_config.dts
45FW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
46TB_FW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
47
48# Add the FW_CONFIG to FIP and specify the same to certtool
49$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
50# Add the TB_FW_CONFIG to FIP and specify the same to certtool
51$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
52
53FDT_SOURCES		+=	${RDN2_BASE}/fdts/${PLAT}_nt_fw_config.dts
54NT_FW_CONFIG		:=	${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
55
56# Add the NT_FW_CONFIG to FIP and specify the same to certtool
57$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
58
59override CTX_INCLUDE_AARCH32_REGS	:= 0
60override ENABLE_AMU			:= 1
61