1# Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 2# 3# SPDX-License-Identifier: BSD-3-Clause 4# 5 6# Enable GICv4 extension with multichip driver 7GIC_ENABLE_V4_EXTN := 1 8GICV3_IMPL_GIC600_MULTICHIP := 1 9 10include plat/arm/css/sgi/sgi-common.mk 11 12RDV1MC_BASE = plat/arm/board/rdv1mc 13 14PLAT_INCLUDES += -I${RDV1MC_BASE}/include/ 15 16SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_v1.S 17 18PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c 19 20BL1_SOURCES += ${SGI_CPU_SOURCES} \ 21 ${RDV1MC_BASE}/rdv1mc_err.c 22 23BL2_SOURCES += ${RDV1MC_BASE}/rdv1mc_plat.c \ 24 ${RDV1MC_BASE}/rdv1mc_security.c \ 25 ${RDV1MC_BASE}/rdv1mc_err.c \ 26 lib/utils/mem_region.c \ 27 plat/arm/common/arm_nor_psci_mem_protect.c 28 29BL31_SOURCES += ${SGI_CPU_SOURCES} \ 30 ${RDV1MC_BASE}/rdv1mc_plat.c \ 31 ${RDV1MC_BASE}/rdv1mc_topology.c \ 32 drivers/cfi/v2m/v2m_flash.c \ 33 drivers/arm/gic/v3/gic600_multichip.c \ 34 lib/utils/mem_region.c \ 35 plat/arm/common/arm_nor_psci_mem_protect.c 36 37ifeq (${TRUSTED_BOARD_BOOT}, 1) 38BL1_SOURCES += ${RDV1MC_BASE}/rdv1mc_trusted_boot.c 39BL2_SOURCES += ${RDV1MC_BASE}/rdv1mc_trusted_boot.c 40endif 41 42# Enable dynamic addition of MMAP regions in BL31 43BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 44 45# Add the FDT_SOURCES and options for Dynamic Config 46FDT_SOURCES += ${RDV1MC_BASE}/fdts/${PLAT}_fw_config.dts \ 47 ${RDV1MC_BASE}/fdts/${PLAT}_tb_fw_config.dts 48FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 49TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 50 51# Add the FW_CONFIG to FIP and specify the same to certtool 52$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 53# Add the TB_FW_CONFIG to FIP and specify the same to certtool 54$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 55 56$(eval $(call CREATE_SEQ,SEQ,4)) 57ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ))) 58 $(error "Chip count for RD-V1-MC should be either $(SEQ) \ 59 currently it is set to ${CSS_SGI_CHIP_COUNT}.") 60endif 61 62FDT_SOURCES += ${RDV1MC_BASE}/fdts/${PLAT}_nt_fw_config.dts 63NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 64 65# Add the NT_FW_CONFIG to FIP and specify the same to certtool 66$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG})) 67 68override CTX_INCLUDE_AARCH32_REGS := 0 69