1 // Test host codegen.
2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix HCHECK
5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix HCHECK
6 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix HCHECK
8
9 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region)
10 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
11 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s
12 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
13 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
14 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
15 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s
16 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
17 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
18
19 // expected-no-diagnostics
20 #ifndef HEADER
21 #define HEADER
22
23 // CHECK-DAG: %ident_t = type { i32, i32, i32, i32, i8* }
24 // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00"
25 // CHECK-DAG: [[DEF_LOC_0:@.+]] = private unnamed_addr constant %ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
26
27 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
without_schedule_clause(float * a,float * b,float * c,float * d)28 void without_schedule_clause(float *a, float *b, float *c, float *d) {
29 #pragma omp target
30 #pragma omp teams
31 #pragma omp distribute
32 for (int i = 33; i < 32000000; i += 7) {
33 a[i] = b[i] * c[i] * d[i];
34 }
35 }
36
37 // CHECK: define {{.*}}void @.omp_outlined.(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[DPTR:%.+]])
38 // CHECK: [[TID_ADDR:%.+]] = alloca i32*
39 // CHECK: [[IV:%.+iv]] = alloca i32
40 // CHECK: [[LB:%.+lb]] = alloca i32
41 // CHECK: [[UB:%.+ub]] = alloca i32
42 // CHECK: [[ST:%.+stride]] = alloca i32
43 // CHECK: [[LAST:%.+last]] = alloca i32
44 // CHECK-DAG: store i32* [[GBL_TIDP]], i32** [[TID_ADDR]]
45 // CHECK-DAG: store i32 0, i32* [[LB]]
46 // CHECK-DAG: store i32 4571423, i32* [[UB]]
47 // CHECK-DAG: store i32 1, i32* [[ST]]
48 // CHECK-DAG: store i32 0, i32* [[LAST]]
49 // CHECK-DAG: [[GBL_TID:%.+]] = load i32*, i32** [[TID_ADDR]]
50 // CHECK-DAG: [[GBL_TIDV:%.+]] = load i32, i32* [[GBL_TID]]
51 // CHECK: call void @__kmpc_for_static_init_{{.+}}(%ident_t* [[DEF_LOC_0]], i32 [[GBL_TIDV]], i32 92, i32* %.omp.is_last, i32* %.omp.lb, i32* %.omp.ub, i32* %.omp.stride, i32 1, i32 1)
52 // CHECK-DAG: [[UBV0:%.+]] = load i32, i32* [[UB]]
53 // CHECK-DAG: [[USWITCH:%.+]] = icmp sgt i32 [[UBV0]], 4571423
54 // CHECK: br i1 [[USWITCH]], label %[[BBCT:.+]], label %[[BBCF:.+]]
55 // CHECK-DAG: [[BBCT]]:
56 // CHECK-DAG: br label %[[BBCE:.+]]
57 // CHECK-DAG: [[BBCF]]:
58 // CHECK-DAG: [[UBV1:%.+]] = load i32, i32* [[UB]]
59 // CHECK-DAG: br label %[[BBCE]]
60 // CHECK: [[BBCE]]:
61 // CHECK: [[SELUB:%.+]] = phi i32 [ 4571423, %[[BBCT]] ], [ [[UBV1]], %[[BBCF]] ]
62 // CHECK: store i32 [[SELUB]], i32* [[UB]]
63 // CHECK: [[LBV0:%.+]] = load i32, i32* [[LB]]
64 // CHECK: store i32 [[LBV0]], i32* [[IV]]
65 // CHECK: br label %[[BBINNFOR:.+]]
66 // CHECK: [[BBINNFOR]]:
67 // CHECK: [[IVVAL0:%.+]] = load i32, i32* [[IV]]
68 // CHECK: [[UBV2:%.+]] = load i32, i32* [[UB]]
69 // CHECK: [[IVLEUB:%.+]] = icmp sle i32 [[IVVAL0]], [[UBV2]]
70 // CHECK: br i1 [[IVLEUB]], label %[[BBINNBODY:.+]], label %[[BBINNEND:.+]]
71 // CHECK: [[BBINNBODY]]:
72 // CHECK: {{.+}} = load i32, i32* [[IV]]
73 // ... loop body ...
74 // CHECK: br label %[[BBBODYCONT:.+]]
75 // CHECK: [[BBBODYCONT]]:
76 // CHECK: br label %[[BBINNINC:.+]]
77 // CHECK: [[BBINNINC]]:
78 // CHECK: [[IVVAL1:%.+]] = load i32, i32* [[IV]]
79 // CHECK: [[IVINC:%.+]] = add nsw i32 [[IVVAL1]], 1
80 // CHECK: store i32 [[IVINC]], i32* [[IV]]
81 // CHECK: br label %[[BBINNFOR]]
82 // CHECK: [[BBINNEND]]:
83 // CHECK: br label %[[LPEXIT:.+]]
84 // CHECK: [[LPEXIT]]:
85 // CHECK: call void @__kmpc_for_static_fini(%ident_t* [[DEF_LOC_0]], i32 [[GBL_TIDV]])
86 // CHECK: ret void
87
88
89 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
static_not_chunked(float * a,float * b,float * c,float * d)90 void static_not_chunked(float *a, float *b, float *c, float *d) {
91 #pragma omp target
92 #pragma omp teams
93 #pragma omp distribute dist_schedule(static)
94 for (int i = 32000000; i > 33; i += -7) {
95 a[i] = b[i] * c[i] * d[i];
96 }
97 }
98
99 // CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[DPTR:%.+]])
100 // CHECK: [[TID_ADDR:%.+]] = alloca i32*
101 // CHECK: [[IV:%.+iv]] = alloca i32
102 // CHECK: [[LB:%.+lb]] = alloca i32
103 // CHECK: [[UB:%.+ub]] = alloca i32
104 // CHECK: [[ST:%.+stride]] = alloca i32
105 // CHECK: [[LAST:%.+last]] = alloca i32
106 // CHECK-DAG: store i32* [[GBL_TIDP]], i32** [[TID_ADDR]]
107 // CHECK-DAG: store i32 0, i32* [[LB]]
108 // CHECK-DAG: store i32 4571423, i32* [[UB]]
109 // CHECK-DAG: store i32 1, i32* [[ST]]
110 // CHECK-DAG: store i32 0, i32* [[LAST]]
111 // CHECK-DAG: [[GBL_TID:%.+]] = load i32*, i32** [[TID_ADDR]]
112 // CHECK-DAG: [[GBL_TIDV:%.+]] = load i32, i32* [[GBL_TID]]
113 // CHECK: call void @__kmpc_for_static_init_{{.+}}(%ident_t* [[DEF_LOC_0]], i32 [[GBL_TIDV]], i32 92, i32* %.omp.is_last, i32* %.omp.lb, i32* %.omp.ub, i32* %.omp.stride, i32 1, i32 1)
114 // CHECK-DAG: [[UBV0:%.+]] = load i32, i32* [[UB]]
115 // CHECK-DAG: [[USWITCH:%.+]] = icmp sgt i32 [[UBV0]], 4571423
116 // CHECK: br i1 [[USWITCH]], label %[[BBCT:.+]], label %[[BBCF:.+]]
117 // CHECK-DAG: [[BBCT]]:
118 // CHECK-DAG: br label %[[BBCE:.+]]
119 // CHECK-DAG: [[BBCF]]:
120 // CHECK-DAG: [[UBV1:%.+]] = load i32, i32* [[UB]]
121 // CHECK-DAG: br label %[[BBCE]]
122 // CHECK: [[BBCE]]:
123 // CHECK: [[SELUB:%.+]] = phi i32 [ 4571423, %[[BBCT]] ], [ [[UBV1]], %[[BBCF]] ]
124 // CHECK: store i32 [[SELUB]], i32* [[UB]]
125 // CHECK: [[LBV0:%.+]] = load i32, i32* [[LB]]
126 // CHECK: store i32 [[LBV0]], i32* [[IV]]
127 // CHECK: br label %[[BBINNFOR:.+]]
128 // CHECK: [[BBINNFOR]]:
129 // CHECK: [[IVVAL0:%.+]] = load i32, i32* [[IV]]
130 // CHECK: [[UBV2:%.+]] = load i32, i32* [[UB]]
131 // CHECK: [[IVLEUB:%.+]] = icmp sle i32 [[IVVAL0]], [[UBV2]]
132 // CHECK: br i1 [[IVLEUB]], label %[[BBINNBODY:.+]], label %[[BBINNEND:.+]]
133 // CHECK: [[BBINNBODY]]:
134 // CHECK: {{.+}} = load i32, i32* [[IV]]
135 // ... loop body ...
136 // CHECK: br label %[[BBBODYCONT:.+]]
137 // CHECK: [[BBBODYCONT]]:
138 // CHECK: br label %[[BBINNINC:.+]]
139 // CHECK: [[BBINNINC]]:
140 // CHECK: [[IVVAL1:%.+]] = load i32, i32* [[IV]]
141 // CHECK: [[IVINC:%.+]] = add nsw i32 [[IVVAL1]], 1
142 // CHECK: store i32 [[IVINC]], i32* [[IV]]
143 // CHECK: br label %[[BBINNFOR]]
144 // CHECK: [[BBINNEND]]:
145 // CHECK: br label %[[LPEXIT:.+]]
146 // CHECK: [[LPEXIT]]:
147 // CHECK: call void @__kmpc_for_static_fini(%ident_t* [[DEF_LOC_0]], i32 [[GBL_TIDV]])
148 // CHECK: ret void
149
150
151 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
static_chunked(float * a,float * b,float * c,float * d)152 void static_chunked(float *a, float *b, float *c, float *d) {
153 #pragma omp target
154 #pragma omp teams
155 #pragma omp distribute dist_schedule(static, 5)
156 for (unsigned i = 131071; i <= 2147483647; i += 127) {
157 a[i] = b[i] * c[i] * d[i];
158 }
159 }
160
161 // CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], float** dereferenceable({{[0-9]+}}) [[APTR:%.+]], float** dereferenceable({{[0-9]+}}) [[BPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[CPTR:%.+]], float** dereferenceable({{[0-9]+}}) [[DPTR:%.+]])
162 // CHECK: [[TID_ADDR:%.+]] = alloca i32*
163 // CHECK: [[IV:%.+iv]] = alloca i32
164 // CHECK: [[LB:%.+lb]] = alloca i32
165 // CHECK: [[UB:%.+ub]] = alloca i32
166 // CHECK: [[ST:%.+stride]] = alloca i32
167 // CHECK: [[LAST:%.+last]] = alloca i32
168 // CHECK-DAG: store i32* [[GBL_TIDP]], i32** [[TID_ADDR]]
169 // CHECK-DAG: store i32 0, i32* [[LB]]
170 // CHECK-DAG: store i32 16908288, i32* [[UB]]
171 // CHECK-DAG: store i32 1, i32* [[ST]]
172 // CHECK-DAG: store i32 0, i32* [[LAST]]
173 // CHECK-DAG: [[GBL_TID:%.+]] = load i32*, i32** [[TID_ADDR]]
174 // CHECK-DAG: [[GBL_TIDV:%.+]] = load i32, i32* [[GBL_TID]]
175 // CHECK: call void @__kmpc_for_static_init_{{.+}}(%ident_t* [[DEF_LOC_0]], i32 [[GBL_TIDV]], i32 91, i32* %.omp.is_last, i32* %.omp.lb, i32* %.omp.ub, i32* %.omp.stride, i32 1, i32 5)
176 // CHECK-DAG: [[UBV0:%.+]] = load i32, i32* [[UB]]
177 // CHECK-DAG: [[USWITCH:%.+]] = icmp ugt i32 [[UBV0]], 16908288
178 // CHECK: br i1 [[USWITCH]], label %[[BBCT:.+]], label %[[BBCF:.+]]
179 // CHECK-DAG: [[BBCT]]:
180 // CHECK-DAG: br label %[[BBCE:.+]]
181 // CHECK-DAG: [[BBCF]]:
182 // CHECK-DAG: [[UBV1:%.+]] = load i32, i32* [[UB]]
183 // CHECK-DAG: br label %[[BBCE]]
184 // CHECK: [[BBCE]]:
185 // CHECK: [[SELUB:%.+]] = phi i32 [ 16908288, %[[BBCT]] ], [ [[UBV1]], %[[BBCF]] ]
186 // CHECK: store i32 [[SELUB]], i32* [[UB]]
187 // CHECK: [[LBV0:%.+]] = load i32, i32* [[LB]]
188 // CHECK: store i32 [[LBV0]], i32* [[IV]]
189 // CHECK: br label %[[BBINNFOR:.+]]
190 // CHECK: [[BBINNFOR]]:
191 // CHECK: [[IVVAL0:%.+]] = load i32, i32* [[IV]]
192 // CHECK: [[UBV2:%.+]] = load i32, i32* [[UB]]
193 // CHECK: [[IVLEUB:%.+]] = icmp ule i32 [[IVVAL0]], [[UBV2]]
194 // CHECK: br i1 [[IVLEUB]], label %[[BBINNBODY:.+]], label %[[BBINNEND:.+]]
195 // CHECK: [[BBINNBODY]]:
196 // CHECK: {{.+}} = load i32, i32* [[IV]]
197 // ... loop body ...
198 // CHECK: br label %[[BBBODYCONT:.+]]
199 // CHECK: [[BBBODYCONT]]:
200 // CHECK: br label %[[BBINNINC:.+]]
201 // CHECK: [[BBINNINC]]:
202 // CHECK: [[IVVAL1:%.+]] = load i32, i32* [[IV]]
203 // CHECK: [[IVINC:%.+]] = add i32 [[IVVAL1]], 1
204 // CHECK: store i32 [[IVINC]], i32* [[IV]]
205 // CHECK: br label %[[BBINNFOR]]
206 // CHECK: [[BBINNEND]]:
207 // CHECK: br label %[[LPEXIT:.+]]
208 // CHECK: [[LPEXIT]]:
209 // CHECK: call void @__kmpc_for_static_fini(%ident_t* [[DEF_LOC_0]], i32 [[GBL_TIDV]])
210 // CHECK: ret void
211
212 // CHECK-LABEL: test_precond
test_precond()213 void test_precond() {
214 char a = 0;
215 #pragma omp target
216 #pragma omp teams
217 #pragma omp distribute
218 for(char i = a; i < 10; ++i);
219 }
220
221 // a is passed as a parameter to the outlined functions
222 // CHECK: define {{.*}}void @.omp_outlined.{{.*}}(i32* noalias [[GBL_TIDP:%.+]], i32* noalias [[BND_TID:%.+]], i8* dereferenceable({{[0-9]+}}) [[APARM:%.+]])
223 // CHECK: store i8* [[APARM]], i8** [[APTRADDR:%.+]]
224 // ..many loads of %0..
225 // CHECK: [[A2:%.+]] = load i8*, i8** [[APTRADDR]]
226 // CHECK: [[AVAL0:%.+]] = load i8, i8* [[A2]]
227 // CHECK: store i8 [[AVAL0]], i8* [[CAP_EXPR:%.+]],
228 // CHECK: [[AVAL1:%.+]] = load i8, i8* [[CAP_EXPR]]
229 // CHECK: load i8, i8* [[CAP_EXPR]]
230 // CHECK: [[AVAL2:%.+]] = load i8, i8* [[CAP_EXPR]]
231 // CHECK: [[ACONV:%.+]] = sext i8 [[AVAL2]] to i32
232 // CHECK: [[ACMP:%.+]] = icmp slt i32 [[ACONV]], 10
233 // CHECK: br i1 [[ACMP]], label %[[PRECOND_THEN:.+]], label %[[PRECOND_END:.+]]
234 // CHECK: [[PRECOND_THEN]]
235 // CHECK: call void @__kmpc_for_static_init_4
236 // CHECK: call void @__kmpc_for_static_fini
237 // CHECK: [[PRECOND_END]]
238
239 // no templates for now, as these require special handling in target regions and/or declare target
240
241 // HCHECK-LABEL: fint
242 // HCHECK: call {{.*}}i32 {{.+}}ftemplate
243 // HCHECK: ret i32
244
245 // HCHECK: load i16, i16*
246 // HCHECK: store i16 %
247 // HCHECK: call i32 @__tgt_target_teams(
248 // HCHECK: call void @__kmpc_for_static_init_4(
249 template <typename T>
ftemplate()250 T ftemplate() {
251 short aa = 0;
252
253 #pragma omp target
254 #pragma omp teams
255 #pragma omp distribute dist_schedule(static, aa)
256 for (int i = 0; i < 100; i++) {
257 }
258 return T();
259 }
260
fint(void)261 int fint(void) { return ftemplate<int>(); }
262
263 #endif
264