1 #include <gtest/gtest.h>
2
3 #include <cpuinfo.h>
4 #include <cpuinfo-mock.h>
5
6
TEST(PROCESSORS,count)7 TEST(PROCESSORS, count) {
8 ASSERT_EQ(6, cpuinfo_get_processors_count());
9 }
10
TEST(PROCESSORS,non_null)11 TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_get_processors());
13 }
14
TEST(PROCESSORS,smt_id)15 TEST(PROCESSORS, smt_id) {
16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 }
19 }
20
TEST(PROCESSORS,core)21 TEST(PROCESSORS, core) {
22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 }
25 }
26
TEST(PROCESSORS,cluster)27 TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 switch (i) {
30 case 0:
31 case 1:
32 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
33 break;
34 case 2:
35 case 3:
36 case 4:
37 case 5:
38 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
39 break;
40 }
41 }
42 }
43
TEST(PROCESSORS,package)44 TEST(PROCESSORS, package) {
45 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
46 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
47 }
48 }
49
TEST(PROCESSORS,linux_id)50 TEST(PROCESSORS, linux_id) {
51 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
52 switch (i) {
53 case 0:
54 case 1:
55 ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id);
56 break;
57 case 2:
58 case 3:
59 case 4:
60 case 5:
61 ASSERT_EQ(i - 2, cpuinfo_get_processor(i)->linux_id);
62 break;
63 }
64 }
65 }
66
TEST(PROCESSORS,l1i)67 TEST(PROCESSORS, l1i) {
68 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
69 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
70 }
71 }
72
TEST(PROCESSORS,l1d)73 TEST(PROCESSORS, l1d) {
74 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
75 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
76 }
77 }
78
TEST(PROCESSORS,l2)79 TEST(PROCESSORS, l2) {
80 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
81 switch (i) {
82 case 0:
83 case 1:
84 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
85 break;
86 case 2:
87 case 3:
88 case 4:
89 case 5:
90 ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
91 break;
92 }
93 }
94 }
95
TEST(PROCESSORS,l3)96 TEST(PROCESSORS, l3) {
97 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
98 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
99 }
100 }
101
TEST(PROCESSORS,l4)102 TEST(PROCESSORS, l4) {
103 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
104 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
105 }
106 }
107
TEST(CORES,count)108 TEST(CORES, count) {
109 ASSERT_EQ(6, cpuinfo_get_cores_count());
110 }
111
TEST(CORES,non_null)112 TEST(CORES, non_null) {
113 ASSERT_TRUE(cpuinfo_get_cores());
114 }
115
TEST(CORES,processor_start)116 TEST(CORES, processor_start) {
117 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
118 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
119 }
120 }
121
TEST(CORES,processor_count)122 TEST(CORES, processor_count) {
123 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
124 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
125 }
126 }
127
TEST(CORES,core_id)128 TEST(CORES, core_id) {
129 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
130 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
131 }
132 }
133
TEST(CORES,cluster)134 TEST(CORES, cluster) {
135 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
136 switch (i) {
137 case 0:
138 case 1:
139 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
140 break;
141 case 2:
142 case 3:
143 case 4:
144 case 5:
145 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
146 break;
147 }
148 }
149 }
150
TEST(CORES,package)151 TEST(CORES, package) {
152 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
153 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
154 }
155 }
156
TEST(CORES,vendor)157 TEST(CORES, vendor) {
158 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
159 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
160 }
161 }
162
TEST(CORES,uarch)163 TEST(CORES, uarch) {
164 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
165 switch (i) {
166 case 0:
167 case 1:
168 ASSERT_EQ(cpuinfo_uarch_cortex_a57, cpuinfo_get_core(i)->uarch);
169 break;
170 case 2:
171 case 3:
172 case 4:
173 case 5:
174 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
175 break;
176 }
177 }
178 }
179
TEST(CORES,midr)180 TEST(CORES, midr) {
181 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
182 switch (i) {
183 case 0:
184 case 1:
185 ASSERT_EQ(UINT32_C(0x411FD072), cpuinfo_get_core(i)->midr);
186 break;
187 case 2:
188 case 3:
189 case 4:
190 case 5:
191 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_core(i)->midr);
192 break;
193 }
194 }
195 }
196
TEST(CORES,DISABLED_frequency)197 TEST(CORES, DISABLED_frequency) {
198 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
199 switch (i) {
200 case 0:
201 case 1:
202 ASSERT_EQ(UINT64_C(1824000000), cpuinfo_get_core(i)->frequency);
203 break;
204 case 2:
205 case 3:
206 case 4:
207 case 5:
208 ASSERT_EQ(UINT64_C(1440000000), cpuinfo_get_core(i)->frequency);
209 break;
210 }
211 }
212 }
213
TEST(CLUSTERS,count)214 TEST(CLUSTERS, count) {
215 ASSERT_EQ(2, cpuinfo_get_clusters_count());
216 }
217
TEST(CLUSTERS,non_null)218 TEST(CLUSTERS, non_null) {
219 ASSERT_TRUE(cpuinfo_get_clusters());
220 }
221
TEST(CLUSTERS,processor_start)222 TEST(CLUSTERS, processor_start) {
223 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
224 switch (i) {
225 case 0:
226 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
227 break;
228 case 1:
229 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_start);
230 break;
231 }
232 }
233 }
234
TEST(CLUSTERS,processor_count)235 TEST(CLUSTERS, processor_count) {
236 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
237 switch (i) {
238 case 0:
239 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_count);
240 break;
241 case 1:
242 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
243 break;
244 }
245 }
246 }
247
TEST(CLUSTERS,core_start)248 TEST(CLUSTERS, core_start) {
249 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
250 switch (i) {
251 case 0:
252 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
253 break;
254 case 1:
255 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_start);
256 break;
257 }
258 }
259 }
260
TEST(CLUSTERS,core_count)261 TEST(CLUSTERS, core_count) {
262 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
263 switch (i) {
264 case 0:
265 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_count);
266 break;
267 case 1:
268 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
269 break;
270 }
271 }
272 }
273
TEST(CLUSTERS,cluster_id)274 TEST(CLUSTERS, cluster_id) {
275 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
276 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
277 }
278 }
279
TEST(CLUSTERS,package)280 TEST(CLUSTERS, package) {
281 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
282 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
283 }
284 }
285
TEST(CLUSTERS,vendor)286 TEST(CLUSTERS, vendor) {
287 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
288 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
289 }
290 }
291
TEST(CLUSTERS,uarch)292 TEST(CLUSTERS, uarch) {
293 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
294 switch (i) {
295 case 0:
296 ASSERT_EQ(cpuinfo_uarch_cortex_a57, cpuinfo_get_cluster(i)->uarch);
297 break;
298 case 1:
299 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch);
300 break;
301 }
302 }
303 }
304
TEST(CLUSTERS,midr)305 TEST(CLUSTERS, midr) {
306 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
307 switch (i) {
308 case 0:
309 ASSERT_EQ(UINT32_C(0x411FD072), cpuinfo_get_cluster(i)->midr);
310 break;
311 case 1:
312 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_cluster(i)->midr);
313 break;
314 }
315 }
316 }
317
TEST(CLUSTERS,DISABLED_frequency)318 TEST(CLUSTERS, DISABLED_frequency) {
319 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
320 switch (i) {
321 case 0:
322 ASSERT_EQ(UINT64_C(1824000000), cpuinfo_get_cluster(i)->frequency);
323 break;
324 case 1:
325 ASSERT_EQ(UINT64_C(1440000000), cpuinfo_get_cluster(i)->frequency);
326 break;
327 }
328 }
329 }
330
TEST(PACKAGES,count)331 TEST(PACKAGES, count) {
332 ASSERT_EQ(1, cpuinfo_get_packages_count());
333 }
334
TEST(PACKAGES,name)335 TEST(PACKAGES, name) {
336 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
337 ASSERT_EQ("Qualcomm MSM8992",
338 std::string(cpuinfo_get_package(i)->name,
339 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
340 }
341 }
342
TEST(PACKAGES,processor_start)343 TEST(PACKAGES, processor_start) {
344 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
345 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
346 }
347 }
348
TEST(PACKAGES,processor_count)349 TEST(PACKAGES, processor_count) {
350 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
351 ASSERT_EQ(6, cpuinfo_get_package(i)->processor_count);
352 }
353 }
354
TEST(PACKAGES,core_start)355 TEST(PACKAGES, core_start) {
356 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
357 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
358 }
359 }
360
TEST(PACKAGES,core_count)361 TEST(PACKAGES, core_count) {
362 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
363 ASSERT_EQ(6, cpuinfo_get_package(i)->core_count);
364 }
365 }
366
TEST(PACKAGES,cluster_start)367 TEST(PACKAGES, cluster_start) {
368 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
369 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
370 }
371 }
372
TEST(PACKAGES,cluster_count)373 TEST(PACKAGES, cluster_count) {
374 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
375 ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count);
376 }
377 }
378
TEST(ISA,thumb)379 TEST(ISA, thumb) {
380 #if CPUINFO_ARCH_ARM
381 ASSERT_TRUE(cpuinfo_has_arm_thumb());
382 #elif CPUINFO_ARCH_ARM64
383 ASSERT_FALSE(cpuinfo_has_arm_thumb());
384 #endif
385 }
386
TEST(ISA,thumb2)387 TEST(ISA, thumb2) {
388 #if CPUINFO_ARCH_ARM
389 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
390 #elif CPUINFO_ARCH_ARM64
391 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
392 #endif
393 }
394
TEST(ISA,armv5e)395 TEST(ISA, armv5e) {
396 #if CPUINFO_ARCH_ARM
397 ASSERT_TRUE(cpuinfo_has_arm_v5e());
398 #elif CPUINFO_ARCH_ARM64
399 ASSERT_FALSE(cpuinfo_has_arm_v5e());
400 #endif
401 }
402
TEST(ISA,armv6)403 TEST(ISA, armv6) {
404 #if CPUINFO_ARCH_ARM
405 ASSERT_TRUE(cpuinfo_has_arm_v6());
406 #elif CPUINFO_ARCH_ARM64
407 ASSERT_FALSE(cpuinfo_has_arm_v6());
408 #endif
409 }
410
TEST(ISA,armv6k)411 TEST(ISA, armv6k) {
412 #if CPUINFO_ARCH_ARM
413 ASSERT_TRUE(cpuinfo_has_arm_v6k());
414 #elif CPUINFO_ARCH_ARM64
415 ASSERT_FALSE(cpuinfo_has_arm_v6k());
416 #endif
417 }
418
TEST(ISA,armv7)419 TEST(ISA, armv7) {
420 #if CPUINFO_ARCH_ARM
421 ASSERT_TRUE(cpuinfo_has_arm_v7());
422 #elif CPUINFO_ARCH_ARM64
423 ASSERT_FALSE(cpuinfo_has_arm_v7());
424 #endif
425 }
426
TEST(ISA,armv7mp)427 TEST(ISA, armv7mp) {
428 #if CPUINFO_ARCH_ARM
429 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
430 #elif CPUINFO_ARCH_ARM64
431 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
432 #endif
433 }
434
TEST(ISA,idiv)435 TEST(ISA, idiv) {
436 ASSERT_TRUE(cpuinfo_has_arm_idiv());
437 }
438
TEST(ISA,vfpv2)439 TEST(ISA, vfpv2) {
440 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
441 }
442
TEST(ISA,vfpv3)443 TEST(ISA, vfpv3) {
444 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
445 }
446
TEST(ISA,vfpv3_d32)447 TEST(ISA, vfpv3_d32) {
448 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
449 }
450
TEST(ISA,vfpv3_fp16)451 TEST(ISA, vfpv3_fp16) {
452 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
453 }
454
TEST(ISA,vfpv3_fp16_d32)455 TEST(ISA, vfpv3_fp16_d32) {
456 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
457 }
458
TEST(ISA,vfpv4)459 TEST(ISA, vfpv4) {
460 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
461 }
462
TEST(ISA,vfpv4_d32)463 TEST(ISA, vfpv4_d32) {
464 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
465 }
466
TEST(ISA,wmmx)467 TEST(ISA, wmmx) {
468 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
469 }
470
TEST(ISA,wmmx2)471 TEST(ISA, wmmx2) {
472 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
473 }
474
TEST(ISA,neon)475 TEST(ISA, neon) {
476 ASSERT_TRUE(cpuinfo_has_arm_neon());
477 }
478
TEST(ISA,neon_fp16)479 TEST(ISA, neon_fp16) {
480 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
481 }
482
TEST(ISA,neon_fma)483 TEST(ISA, neon_fma) {
484 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
485 }
486
TEST(ISA,atomics)487 TEST(ISA, atomics) {
488 ASSERT_FALSE(cpuinfo_has_arm_atomics());
489 }
490
TEST(ISA,neon_rdm)491 TEST(ISA, neon_rdm) {
492 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
493 }
494
TEST(ISA,fp16_arith)495 TEST(ISA, fp16_arith) {
496 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
497 }
498
TEST(ISA,neon_fp16_arith)499 TEST(ISA, neon_fp16_arith) {
500 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16_arith());
501 }
502
TEST(ISA,neon_dot)503 TEST(ISA, neon_dot) {
504 ASSERT_FALSE(cpuinfo_has_arm_neon_dot());
505 }
506
TEST(ISA,jscvt)507 TEST(ISA, jscvt) {
508 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
509 }
510
TEST(ISA,fcma)511 TEST(ISA, fcma) {
512 ASSERT_FALSE(cpuinfo_has_arm_fcma());
513 }
514
TEST(ISA,aes)515 TEST(ISA, aes) {
516 ASSERT_TRUE(cpuinfo_has_arm_aes());
517 }
518
TEST(ISA,sha1)519 TEST(ISA, sha1) {
520 ASSERT_TRUE(cpuinfo_has_arm_sha1());
521 }
522
TEST(ISA,sha2)523 TEST(ISA, sha2) {
524 ASSERT_TRUE(cpuinfo_has_arm_sha2());
525 }
526
TEST(ISA,pmull)527 TEST(ISA, pmull) {
528 ASSERT_TRUE(cpuinfo_has_arm_pmull());
529 }
530
TEST(ISA,crc32)531 TEST(ISA, crc32) {
532 ASSERT_TRUE(cpuinfo_has_arm_crc32());
533 }
534
TEST(L1I,count)535 TEST(L1I, count) {
536 ASSERT_EQ(6, cpuinfo_get_l1i_caches_count());
537 }
538
TEST(L1I,non_null)539 TEST(L1I, non_null) {
540 ASSERT_TRUE(cpuinfo_get_l1i_caches());
541 }
542
TEST(L1I,size)543 TEST(L1I, size) {
544 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
545 switch (i) {
546 case 0:
547 case 1:
548 ASSERT_EQ(48 * 1024, cpuinfo_get_l1i_cache(i)->size);
549 break;
550 case 2:
551 case 3:
552 case 4:
553 case 5:
554 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
555 break;
556 }
557 }
558 }
559
TEST(L1I,associativity)560 TEST(L1I, associativity) {
561 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
562 switch (i) {
563 case 0:
564 case 1:
565 ASSERT_EQ(3, cpuinfo_get_l1i_cache(i)->associativity);
566 break;
567 case 2:
568 case 3:
569 case 4:
570 case 5:
571 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
572 break;
573 }
574 }
575 }
576
TEST(L1I,sets)577 TEST(L1I, sets) {
578 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
579 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
580 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
581 }
582 }
583
TEST(L1I,partitions)584 TEST(L1I, partitions) {
585 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
586 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
587 }
588 }
589
TEST(L1I,line_size)590 TEST(L1I, line_size) {
591 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
592 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
593 }
594 }
595
TEST(L1I,flags)596 TEST(L1I, flags) {
597 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
598 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
599 }
600 }
601
TEST(L1I,processors)602 TEST(L1I, processors) {
603 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
604 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
605 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
606 }
607 }
608
TEST(L1D,count)609 TEST(L1D, count) {
610 ASSERT_EQ(6, cpuinfo_get_l1d_caches_count());
611 }
612
TEST(L1D,non_null)613 TEST(L1D, non_null) {
614 ASSERT_TRUE(cpuinfo_get_l1d_caches());
615 }
616
TEST(L1D,size)617 TEST(L1D, size) {
618 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
619 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
620 }
621 }
622
TEST(L1D,associativity)623 TEST(L1D, associativity) {
624 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
625 switch (i) {
626 case 0:
627 case 1:
628 ASSERT_EQ(2, cpuinfo_get_l1d_cache(i)->associativity);
629 break;
630 case 2:
631 case 3:
632 case 4:
633 case 5:
634 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
635 break;
636 }
637 }
638 }
639
TEST(L1D,sets)640 TEST(L1D, sets) {
641 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
642 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
643 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
644 }
645 }
646
TEST(L1D,partitions)647 TEST(L1D, partitions) {
648 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
649 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
650 }
651 }
652
TEST(L1D,line_size)653 TEST(L1D, line_size) {
654 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
655 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
656 }
657 }
658
TEST(L1D,flags)659 TEST(L1D, flags) {
660 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
661 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
662 }
663 }
664
TEST(L1D,processors)665 TEST(L1D, processors) {
666 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
667 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
668 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
669 }
670 }
671
TEST(L2,count)672 TEST(L2, count) {
673 ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
674 }
675
TEST(L2,non_null)676 TEST(L2, non_null) {
677 ASSERT_TRUE(cpuinfo_get_l2_caches());
678 }
679
TEST(L2,size)680 TEST(L2, size) {
681 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
682 switch (i) {
683 case 0:
684 ASSERT_EQ(1 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size);
685 break;
686 case 1:
687 ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
688 break;
689 }
690 }
691 }
692
TEST(L2,associativity)693 TEST(L2, associativity) {
694 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
695 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
696 }
697 }
698
TEST(L2,sets)699 TEST(L2, sets) {
700 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
701 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
702 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
703 }
704 }
705
TEST(L2,partitions)706 TEST(L2, partitions) {
707 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
708 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
709 }
710 }
711
TEST(L2,line_size)712 TEST(L2, line_size) {
713 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
714 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
715 }
716 }
717
TEST(L2,flags)718 TEST(L2, flags) {
719 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
720 switch (i) {
721 case 0:
722 ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags);
723 break;
724 case 1:
725 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
726 break;
727 }
728 }
729 }
730
TEST(L2,processors)731 TEST(L2, processors) {
732 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
733 switch (i) {
734 case 0:
735 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
736 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count);
737 break;
738 case 1:
739 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_start);
740 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
741 break;
742 }
743 }
744 }
745
TEST(L3,none)746 TEST(L3, none) {
747 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
748 ASSERT_FALSE(cpuinfo_get_l3_caches());
749 }
750
TEST(L4,none)751 TEST(L4, none) {
752 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
753 ASSERT_FALSE(cpuinfo_get_l4_caches());
754 }
755
756 #include <nexus5x.h>
757
main(int argc,char * argv[])758 int main(int argc, char* argv[]) {
759 #if CPUINFO_ARCH_ARM
760 cpuinfo_set_hwcap(UINT32_C(0x0027B0D6));
761 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
762 #elif CPUINFO_ARCH_ARM64
763 cpuinfo_set_hwcap(UINT32_C(0x000000FF));
764 #endif
765 cpuinfo_mock_filesystem(filesystem);
766 #ifdef __ANDROID__
767 cpuinfo_mock_android_properties(properties);
768 #endif
769 cpuinfo_initialize();
770 ::testing::InitGoogleTest(&argc, argv);
771 return RUN_ALL_TESTS();
772 }