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1; RUN: opt -basic-aa -print-memoryssa -verify-memoryssa -enable-new-pm=0 -analyze < %s 2>&1 | FileCheck %s
2; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s
3;
4; many-dom.ll, with an added back-edge back into the switch.
5; Because people love their gotos.
6
7declare i1 @getBool() readnone
8
9define i32 @foo(i32* %p) {
10entry:
11  br label %loopbegin
12
13loopbegin:
14; CHECK: 9 = MemoryPhi({entry,liveOnEntry},{sw.epilog,6})
15; CHECK-NEXT: %n =
16  %n = phi i32 [ 0, %entry ], [ %1, %sw.epilog ]
17  %m = alloca i32, align 4
18  switch i32 %n, label %sw.default [
19    i32 0, label %sw.bb
20    i32 1, label %sw.bb1
21    i32 2, label %sw.bb2
22    i32 3, label %sw.bb3
23  ]
24
25sw.bb:
26; CHECK: 1 = MemoryDef(9)
27; CHECK-NEXT: store i32 1
28  store i32 1, i32* %m, align 4
29  br label %sw.epilog
30
31sw.bb1:
32; CHECK: 2 = MemoryDef(9)
33; CHECK-NEXT: store i32 2
34  store i32 2, i32* %m, align 4
35  br label %sw.epilog
36
37sw.bb2:
38; CHECK: 3 = MemoryDef(9)
39; CHECK-NEXT: store i32 3
40  store i32 3, i32* %m, align 4
41  br label %sw.epilog
42
43sw.bb3:
44; CHECK: 10 = MemoryPhi({loopbegin,9},{sw.almostexit,6})
45; CHECK: 4 = MemoryDef(10)
46; CHECK-NEXT: store i32 4
47  store i32 4, i32* %m, align 4
48  br label %sw.epilog
49
50sw.default:
51; CHECK: 5 = MemoryDef(9)
52; CHECK-NEXT: store i32 5
53  store i32 5, i32* %m, align 4
54  br label %sw.epilog
55
56sw.epilog:
57; CHECK: 8 = MemoryPhi({sw.default,5},{sw.bb3,4},{sw.bb,1},{sw.bb1,2},{sw.bb2,3})
58; CHECK-NEXT: MemoryUse(8)
59; CHECK-NEXT: %0 =
60  %0 = load i32, i32* %m, align 4
61; CHECK: 6 = MemoryDef(8)
62; CHECK-NEXT: %1 =
63  %1 = load volatile i32, i32* %p, align 4
64  %2 = icmp eq i32 %0, %1
65  br i1 %2, label %sw.almostexit, label %loopbegin
66
67sw.almostexit:
68  %3 = icmp eq i32 0, %1
69  br i1 %3, label %exit, label %sw.bb3
70
71exit:
72; CHECK: 7 = MemoryDef(6)
73; CHECK-NEXT: %4 = load volatile i32
74  %4 = load volatile i32, i32* %p, align 4
75  %5 = add i32 %4, %1
76  ret i32 %5
77}
78