1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2 3# RUN:llc %s -verify-machineinstrs -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=-fullfp16 -o - | FileCheck %s --check-prefix=NO-FP16 4# RUN:llc %s -verify-machineinstrs -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=+fullfp16 -o - | FileCheck %s --check-prefix=FP16 5 6... 7--- 8name: test_f16.round 9alignment: 4 10tracksRegLiveness: true 11machineFunctionInfo: {} 12body: | 13 bb.0: 14 liveins: $h0 15 16 ; NO-FP16-LABEL: name: test_f16.round 17 ; NO-FP16: liveins: $h0 18 ; NO-FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0 19 ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16) 20 ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]] 21 ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32) 22 ; NO-FP16: $h0 = COPY [[FPTRUNC]](s16) 23 ; NO-FP16: RET_ReallyLR implicit $h0 24 ; FP16-LABEL: name: test_f16.round 25 ; FP16: liveins: $h0 26 ; FP16: [[COPY:%[0-9]+]]:_(s16) = COPY $h0 27 ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s16) = G_INTRINSIC_ROUND [[COPY]] 28 ; FP16: $h0 = COPY [[INTRINSIC_ROUND]](s16) 29 ; FP16: RET_ReallyLR implicit $h0 30 %0:_(s16) = COPY $h0 31 %1:_(s16) = G_INTRINSIC_ROUND %0 32 $h0 = COPY %1(s16) 33 RET_ReallyLR implicit $h0 34 35... 36--- 37name: test_f32.round 38alignment: 4 39tracksRegLiveness: true 40machineFunctionInfo: {} 41body: | 42 bb.0: 43 liveins: $s0 44 45 ; NO-FP16-LABEL: name: test_f32.round 46 ; NO-FP16: liveins: $s0 47 ; NO-FP16: [[COPY:%[0-9]+]]:_(s32) = COPY $s0 48 ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[COPY]] 49 ; NO-FP16: $s0 = COPY [[INTRINSIC_ROUND]](s32) 50 ; NO-FP16: RET_ReallyLR implicit $s0 51 ; FP16-LABEL: name: test_f32.round 52 ; FP16: liveins: $s0 53 ; FP16: [[COPY:%[0-9]+]]:_(s32) = COPY $s0 54 ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[COPY]] 55 ; FP16: $s0 = COPY [[INTRINSIC_ROUND]](s32) 56 ; FP16: RET_ReallyLR implicit $s0 57 %0:_(s32) = COPY $s0 58 %1:_(s32) = G_INTRINSIC_ROUND %0 59 $s0 = COPY %1(s32) 60 RET_ReallyLR implicit $s0 61 62... 63--- 64name: test_f64.round 65alignment: 4 66tracksRegLiveness: true 67machineFunctionInfo: {} 68body: | 69 bb.0: 70 liveins: $d0 71 72 ; NO-FP16-LABEL: name: test_f64.round 73 ; NO-FP16: liveins: $d0 74 ; NO-FP16: [[COPY:%[0-9]+]]:_(s64) = COPY $d0 75 ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s64) = G_INTRINSIC_ROUND [[COPY]] 76 ; NO-FP16: $d0 = COPY [[INTRINSIC_ROUND]](s64) 77 ; NO-FP16: RET_ReallyLR implicit $d0 78 ; FP16-LABEL: name: test_f64.round 79 ; FP16: liveins: $d0 80 ; FP16: [[COPY:%[0-9]+]]:_(s64) = COPY $d0 81 ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s64) = G_INTRINSIC_ROUND [[COPY]] 82 ; FP16: $d0 = COPY [[INTRINSIC_ROUND]](s64) 83 ; FP16: RET_ReallyLR implicit $d0 84 %0:_(s64) = COPY $d0 85 %1:_(s64) = G_INTRINSIC_ROUND %0 86 $d0 = COPY %1(s64) 87 RET_ReallyLR implicit $d0 88 89... 90--- 91name: test_v8f16.round 92alignment: 4 93tracksRegLiveness: true 94machineFunctionInfo: {} 95body: | 96 bb.0: 97 liveins: $q0 98 99 ; NO-FP16-LABEL: name: test_v8f16.round 100 ; NO-FP16: liveins: $q0 101 ; NO-FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0 102 ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16), [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16), [[UV6:%[0-9]+]]:_(s16), [[UV7:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<8 x s16>) 103 ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16) 104 ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]] 105 ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32) 106 ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16) 107 ; NO-FP16: [[INTRINSIC_ROUND1:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT1]] 108 ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND1]](s32) 109 ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16) 110 ; NO-FP16: [[INTRINSIC_ROUND2:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT2]] 111 ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND2]](s32) 112 ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16) 113 ; NO-FP16: [[INTRINSIC_ROUND3:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT3]] 114 ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND3]](s32) 115 ; NO-FP16: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[UV4]](s16) 116 ; NO-FP16: [[INTRINSIC_ROUND4:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT4]] 117 ; NO-FP16: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND4]](s32) 118 ; NO-FP16: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[UV5]](s16) 119 ; NO-FP16: [[INTRINSIC_ROUND5:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT5]] 120 ; NO-FP16: [[FPTRUNC5:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND5]](s32) 121 ; NO-FP16: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[UV6]](s16) 122 ; NO-FP16: [[INTRINSIC_ROUND6:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT6]] 123 ; NO-FP16: [[FPTRUNC6:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND6]](s32) 124 ; NO-FP16: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[UV7]](s16) 125 ; NO-FP16: [[INTRINSIC_ROUND7:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT7]] 126 ; NO-FP16: [[FPTRUNC7:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND7]](s32) 127 ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16), [[FPTRUNC4]](s16), [[FPTRUNC5]](s16), [[FPTRUNC6]](s16), [[FPTRUNC7]](s16) 128 ; NO-FP16: $q0 = COPY [[BUILD_VECTOR]](<8 x s16>) 129 ; NO-FP16: RET_ReallyLR implicit $q0 130 ; FP16-LABEL: name: test_v8f16.round 131 ; FP16: liveins: $q0 132 ; FP16: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0 133 ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<8 x s16>) = G_INTRINSIC_ROUND [[COPY]] 134 ; FP16: $q0 = COPY [[INTRINSIC_ROUND]](<8 x s16>) 135 ; FP16: RET_ReallyLR implicit $q0 136 %0:_(<8 x s16>) = COPY $q0 137 %1:_(<8 x s16>) = G_INTRINSIC_ROUND %0 138 $q0 = COPY %1(<8 x s16>) 139 RET_ReallyLR implicit $q0 140 141... 142--- 143name: test_v4f16.round 144alignment: 4 145tracksRegLiveness: true 146registers: 147 - { id: 0, class: _ } 148 - { id: 1, class: _ } 149machineFunctionInfo: {} 150body: | 151 bb.0: 152 liveins: $d0 153 154 ; NO-FP16-LABEL: name: test_v4f16.round 155 ; NO-FP16: liveins: $d0 156 ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 157 ; NO-FP16: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 158 ; NO-FP16: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16) 159 ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]] 160 ; NO-FP16: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32) 161 ; NO-FP16: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16) 162 ; NO-FP16: [[INTRINSIC_ROUND1:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT1]] 163 ; NO-FP16: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND1]](s32) 164 ; NO-FP16: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16) 165 ; NO-FP16: [[INTRINSIC_ROUND2:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT2]] 166 ; NO-FP16: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND2]](s32) 167 ; NO-FP16: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16) 168 ; NO-FP16: [[INTRINSIC_ROUND3:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT3]] 169 ; NO-FP16: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND3]](s32) 170 ; NO-FP16: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC1]](s16), [[FPTRUNC2]](s16), [[FPTRUNC3]](s16) 171 ; NO-FP16: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>) 172 ; NO-FP16: RET_ReallyLR implicit $d0 173 ; FP16-LABEL: name: test_v4f16.round 174 ; FP16: liveins: $d0 175 ; FP16: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 176 ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s16>) = G_INTRINSIC_ROUND [[COPY]] 177 ; FP16: $d0 = COPY [[INTRINSIC_ROUND]](<4 x s16>) 178 ; FP16: RET_ReallyLR implicit $d0 179 %0:_(<4 x s16>) = COPY $d0 180 %1:_(<4 x s16>) = G_INTRINSIC_ROUND %0 181 $d0 = COPY %1(<4 x s16>) 182 RET_ReallyLR implicit $d0 183 184... 185--- 186name: test_v2f32.round 187alignment: 4 188tracksRegLiveness: true 189registers: 190 - { id: 0, class: _ } 191 - { id: 1, class: _ } 192machineFunctionInfo: {} 193body: | 194 bb.0: 195 liveins: $d0 196 197 ; NO-FP16-LABEL: name: test_v2f32.round 198 ; NO-FP16: liveins: $d0 199 ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 200 ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_ROUND [[COPY]] 201 ; NO-FP16: $d0 = COPY [[INTRINSIC_ROUND]](<2 x s32>) 202 ; NO-FP16: RET_ReallyLR implicit $d0 203 ; FP16-LABEL: name: test_v2f32.round 204 ; FP16: liveins: $d0 205 ; FP16: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 206 ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_ROUND [[COPY]] 207 ; FP16: $d0 = COPY [[INTRINSIC_ROUND]](<2 x s32>) 208 ; FP16: RET_ReallyLR implicit $d0 209 %0:_(<2 x s32>) = COPY $d0 210 %1:_(<2 x s32>) = G_INTRINSIC_ROUND %0 211 $d0 = COPY %1(<2 x s32>) 212 RET_ReallyLR implicit $d0 213 214... 215--- 216name: test_v4f32.round 217alignment: 4 218tracksRegLiveness: true 219registers: 220 - { id: 0, class: _ } 221 - { id: 1, class: _ } 222machineFunctionInfo: {} 223body: | 224 bb.0: 225 liveins: $q0 226 227 ; NO-FP16-LABEL: name: test_v4f32.round 228 ; NO-FP16: liveins: $q0 229 ; NO-FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 230 ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[COPY]] 231 ; NO-FP16: $q0 = COPY [[INTRINSIC_ROUND]](<4 x s32>) 232 ; NO-FP16: RET_ReallyLR implicit $q0 233 ; FP16-LABEL: name: test_v4f32.round 234 ; FP16: liveins: $q0 235 ; FP16: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 236 ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[COPY]] 237 ; FP16: $q0 = COPY [[INTRINSIC_ROUND]](<4 x s32>) 238 ; FP16: RET_ReallyLR implicit $q0 239 %0:_(<4 x s32>) = COPY $q0 240 %1:_(<4 x s32>) = G_INTRINSIC_ROUND %0 241 $q0 = COPY %1(<4 x s32>) 242 RET_ReallyLR implicit $q0 243 244... 245--- 246name: test_v2f64.round 247alignment: 4 248tracksRegLiveness: true 249registers: 250 - { id: 0, class: _ } 251 - { id: 1, class: _ } 252machineFunctionInfo: {} 253body: | 254 bb.0: 255 liveins: $q0 256 257 ; NO-FP16-LABEL: name: test_v2f64.round 258 ; NO-FP16: liveins: $q0 259 ; NO-FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 260 ; NO-FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_ROUND [[COPY]] 261 ; NO-FP16: $q0 = COPY [[INTRINSIC_ROUND]](<2 x s64>) 262 ; NO-FP16: RET_ReallyLR implicit $q0 263 ; FP16-LABEL: name: test_v2f64.round 264 ; FP16: liveins: $q0 265 ; FP16: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 266 ; FP16: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_ROUND [[COPY]] 267 ; FP16: $q0 = COPY [[INTRINSIC_ROUND]](<2 x s64>) 268 ; FP16: RET_ReallyLR implicit $q0 269 %0:_(<2 x s64>) = COPY $q0 270 %1:_(<2 x s64>) = G_INTRINSIC_ROUND %0 271 $q0 = COPY %1(<2 x s64>) 272 RET_ReallyLR implicit $q0 273