1; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-linux-gnu | FileCheck %s 2 3; Note that this should be refactored (for efficiency if nothing else) 4; when the PCS is implemented so we don't have to worry about the 5; loads and stores. 6 7@var_i32 = global i32 42 8@var2_i32 = global i32 43 9@var_i64 = global i64 0 10 11; Add pure 12-bit immediates: 12define void @add_small() { 13; CHECK-LABEL: add_small: 14 15; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #4095 16 %val32 = load i32, i32* @var_i32 17 %newval32 = add i32 %val32, 4095 18 store i32 %newval32, i32* @var_i32 19 20; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, #52 21 %val64 = load i64, i64* @var_i64 22 %newval64 = add i64 %val64, 52 23 store i64 %newval64, i64* @var_i64 24 25 ret void 26} 27 28; Make sure we grab the imm variant when the register operand 29; can be implicitly zero-extend. 30; We used to generate something horrible like this: 31; wA = ldrb 32; xB = ldimm 12 33; xC = add xB, wA, uxtb 34; whereas this can be achieved with: 35; wA = ldrb 36; xC = add xA, #12 ; <- xA implicitly zero extend wA. 37define void @add_small_imm(i8* %p, i64* %q, i32 %b, i32* %addr) { 38; CHECK-LABEL: add_small_imm: 39entry: 40 41; CHECK: ldrb w[[LOAD32:[0-9]+]], [x0] 42 %t = load i8, i8* %p 43 %promoted = zext i8 %t to i64 44 %zextt = zext i8 %t to i32 45 %add = add nuw i32 %zextt, %b 46 47; CHECK: add [[ADD2:x[0-9]+]], x[[LOAD32]], #12 48 %add2 = add nuw i64 %promoted, 12 49 store i32 %add, i32* %addr 50 51; CHECK: str [[ADD2]], [x1] 52 store i64 %add2, i64* %q 53 ret void 54} 55 56; Add 12-bit immediates, shifted left by 12 bits 57define void @add_med() { 58; CHECK-LABEL: add_med: 59 60; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{#3567, lsl #12|#14610432}} 61 %val32 = load i32, i32* @var_i32 62 %newval32 = add i32 %val32, 14610432 ; =0xdef000 63 store i32 %newval32, i32* @var_i32 64 65; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{#4095, lsl #12|#16773120}} 66 %val64 = load i64, i64* @var_i64 67 %newval64 = add i64 %val64, 16773120 ; =0xfff000 68 store i64 %newval64, i64* @var_i64 69 70 ret void 71} 72 73; Subtract 12-bit immediates 74define void @sub_small() { 75; CHECK-LABEL: sub_small: 76 77; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, #4095 78 %val32 = load i32, i32* @var_i32 79 %newval32 = sub i32 %val32, 4095 80 store i32 %newval32, i32* @var_i32 81 82; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, #52 83 %val64 = load i64, i64* @var_i64 84 %newval64 = sub i64 %val64, 52 85 store i64 %newval64, i64* @var_i64 86 87 ret void 88} 89 90; Subtract 12-bit immediates, shifted left by 12 bits 91define void @sub_med() { 92; CHECK-LABEL: sub_med: 93 94; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{#3567, lsl #12|#14610432}} 95 %val32 = load i32, i32* @var_i32 96 %newval32 = sub i32 %val32, 14610432 ; =0xdef000 97 store i32 %newval32, i32* @var_i32 98 99; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{#4095, lsl #12|#16773120}} 100 %val64 = load i64, i64* @var_i64 101 %newval64 = sub i64 %val64, 16773120 ; =0xfff000 102 store i64 %newval64, i64* @var_i64 103 104 ret void 105} 106 107define void @testing() { 108; CHECK-LABEL: testing: 109 %val = load i32, i32* @var_i32 110 %val2 = load i32, i32* @var2_i32 111 112; CHECK: cmp {{w[0-9]+}}, #4095 113; CHECK: b.ne [[RET:.?LBB[0-9]+_[0-9]+]] 114 %cmp_pos_small = icmp ne i32 %val, 4095 115 br i1 %cmp_pos_small, label %ret, label %test2 116 117test2: 118; CHECK: cmp {{w[0-9]+}}, {{#3567, lsl #12|#14610432}} 119; CHECK: b.lo [[RET]] 120 %newval2 = add i32 %val, 1 121 store i32 %newval2, i32* @var_i32 122 %cmp_pos_big = icmp ult i32 %val2, 14610432 123 br i1 %cmp_pos_big, label %ret, label %test3 124 125test3: 126; CHECK: cmp {{w[0-9]+}}, #123 127; CHECK: b.lt [[RET]] 128 %newval3 = add i32 %val, 2 129 store i32 %newval3, i32* @var_i32 130 %cmp_pos_slt = icmp slt i32 %val, 123 131 br i1 %cmp_pos_slt, label %ret, label %test4 132 133test4: 134; CHECK: cmp {{w[0-9]+}}, #321 135; CHECK: b.gt [[RET]] 136 %newval4 = add i32 %val, 3 137 store i32 %newval4, i32* @var_i32 138 %cmp_pos_sgt = icmp sgt i32 %val2, 321 139 br i1 %cmp_pos_sgt, label %ret, label %test5 140 141test5: 142; CHECK: cmn {{w[0-9]+}}, #444 143; CHECK: b.gt [[RET]] 144 %newval5 = add i32 %val, 4 145 store i32 %newval5, i32* @var_i32 146 %cmp_neg_uge = icmp sgt i32 %val2, -444 147 br i1 %cmp_neg_uge, label %ret, label %test6 148 149test6: 150 %newval6 = add i32 %val, 5 151 store i32 %newval6, i32* @var_i32 152 ret void 153 154ret: 155 ret void 156} 157; TODO: adds/subs 158