1; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s 2 3define <4 x i16> @shuffle1(<4 x i16> %v) { 4; CHECK-LABEL: shuffle1: 5; CHECK: dup v0.2s, v0.s[0] 6; CHECK-NEXT: ret 7entry: 8 %res = shufflevector <4 x i16> %v, <4 x i16> undef, <4 x i32> <i32 0, i32 undef, i32 0, i32 1> 9 ret <4 x i16> %res 10} 11 12define <4 x i16> @shuffle2(<4 x i16> %v) { 13; CHECK-LABEL: shuffle2: 14; CHECK: dup v0.2s, v0.s[1] 15; CHECK-NEXT: ret 16entry: 17 %res = shufflevector <4 x i16> %v, <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 3> 18 ret <4 x i16> %res 19} 20 21define <8 x i16> @shuffle3(<8 x i16> %v) { 22; CHECK-LABEL: shuffle3: 23; CHECK: dup v0.2d, v0.d[0] 24; CHECK-NEXT: ret 25entry: 26 %res = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 2, i32 3, 27 i32 undef, i32 1, i32 undef, i32 3> 28 ret <8 x i16> %res 29} 30 31define <4 x i32> @shuffle4(<4 x i32> %v) { 32; CHECK-LABEL: shuffle4: 33; CHECK: dup v0.2d, v0.d[0] 34; CHECK-NEXT: ret 35entry: 36 %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1> 37 ret <4 x i32> %res 38} 39 40define <16 x i8> @shuffle5(<16 x i8> %v) { 41; CHECK-LABEL: shuffle5: 42; CHECK: dup v0.4s, v0.s[2] 43; CHECK-NEXT: ret 44entry: 45 %res = shufflevector <16 x i8> %v, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, 46 i32 8, i32 9, i32 10, i32 11, 47 i32 8, i32 9, i32 10, i32 11, 48 i32 8, i32 9, i32 10, i32 11> 49 ret <16 x i8> %res 50} 51 52define <16 x i8> @shuffle6(<16 x i8> %v) { 53; CHECK-LABEL: shuffle6: 54; CHECK: dup v0.2d, v0.d[1] 55; CHECK-NEXT: ret 56entry: 57 %res = shufflevector <16 x i8> %v, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, 58 i32 12, i32 13, i32 14, i32 15, 59 i32 8, i32 9, i32 10, i32 11, 60 i32 12, i32 13, i32 14, i32 15> 61 ret <16 x i8> %res 62} 63 64define <8 x i8> @shuffle7(<8 x i8> %v) { 65; CHECK-LABEL: shuffle7: 66; CHECK: dup v0.2s, v0.s[1] 67; CHECK-NEXT: ret 68entry: 69 %res = shufflevector <8 x i8> %v, <8 x i8> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 undef, 70 i32 undef, i32 5, i32 6, i32 undef> 71 ret <8 x i8> %res 72} 73 74define <8 x i8> @shuffle8(<8 x i8> %v) { 75; CHECK-LABEL: shuffle8: 76; CHECK: dup v0.4h, v0.h[3] 77; CHECK-NEXT: ret 78entry: 79 %res = shufflevector <8 x i8> %v, <8 x i8> undef, <8 x i32> <i32 6, i32 7, i32 6, i32 undef, 80 i32 undef, i32 7, i32 6, i32 undef> 81 ret <8 x i8> %res 82} 83 84; No blocks 85define <8 x i8> @shuffle_not1(<16 x i8> %v) { 86; CHECK-LABEL: shuffle_not1: 87; CHECK: ext v0.16b, v0.16b, v0.16b, #2 88 %res = shufflevector <16 x i8> %v, <16 x i8> undef, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9> 89 ret <8 x i8> %res 90} 91 92; Block is not a proper lane 93define <4 x i32> @shuffle_not2(<4 x i32> %v) { 94; CHECK-LABEL: shuffle_not2: 95; CHECK-NOT: dup 96; CHECK: ext 97; CHECK: ret 98entry: 99 %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 1, i32 2> 100 ret <4 x i32> %res 101} 102 103; Block size is equal to vector size 104define <4 x i16> @shuffle_not3(<4 x i16> %v) { 105; CHECK-LABEL: shuffle_not3: 106; CHECK-NOT: dup 107; CHECK: ret 108entry: 109 %res = shufflevector <4 x i16> %v, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 110 ret <4 x i16> %res 111} 112 113; Blocks mismatch 114define <8 x i8> @shuffle_not4(<8 x i8> %v) { 115; CHECK-LABEL: shuffle_not4: 116; CHECK-NOT: dup 117; CHECK: ret 118entry: 119 %res = shufflevector <8 x i8> %v, <8 x i8> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 undef, 120 i32 undef, i32 5, i32 5, i32 undef> 121 ret <8 x i8> %res 122} 123