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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name:            narrow_lshr_s64_32_s64amt
6tracksRegLiveness: true
7body:             |
8  bb.0:
9    liveins: $vgpr0_vgpr1
10
11    ; CHECK-LABEL: name: narrow_lshr_s64_32_s64amt
12    ; CHECK: liveins: $vgpr0_vgpr1
13    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
14    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
15    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
16    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV1]](s32), [[C]](s32)
17    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
18    %0:_(s64) = COPY $vgpr0_vgpr1
19    %1:_(s64) = G_CONSTANT i64 32
20    %2:_(s64) = G_LSHR %0, %1
21    $vgpr0_vgpr1 = COPY %2
22...
23
24---
25name:            narrow_lshr_s64_32
26tracksRegLiveness: true
27body:             |
28  bb.0:
29    liveins: $vgpr0_vgpr1
30
31    ; CHECK-LABEL: name: narrow_lshr_s64_32
32    ; CHECK: liveins: $vgpr0_vgpr1
33    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
34    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
35    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
36    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV1]](s32), [[C]](s32)
37    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
38    %0:_(s64) = COPY $vgpr0_vgpr1
39    %1:_(s32) = G_CONSTANT i32 32
40    %2:_(s64) = G_LSHR %0, %1
41    $vgpr0_vgpr1 = COPY %2
42...
43
44---
45name:            narrow_lshr_s64_33
46tracksRegLiveness: true
47body:             |
48  bb.0:
49    liveins: $vgpr0_vgpr1
50
51    ; CHECK-LABEL: name: narrow_lshr_s64_33
52    ; CHECK: liveins: $vgpr0_vgpr1
53    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
54    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
55    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
56    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)
57    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
58    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LSHR]](s32), [[C1]](s32)
59    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
60    %0:_(s64) = COPY $vgpr0_vgpr1
61    %1:_(s32) = G_CONSTANT i32 33
62    %2:_(s64) = G_LSHR %0, %1
63    $vgpr0_vgpr1 = COPY %2
64...
65
66---
67name:            narrow_lshr_s64_31
68tracksRegLiveness: true
69body:             |
70  bb.0:
71    liveins: $vgpr0_vgpr1
72
73    ; CHECK-LABEL: name: narrow_lshr_s64_31
74    ; CHECK: liveins: $vgpr0_vgpr1
75    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
76    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
77    ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C]](s32)
78    ; CHECK: $vgpr0_vgpr1 = COPY [[LSHR]](s64)
79    %0:_(s64) = COPY $vgpr0_vgpr1
80    %1:_(s32) = G_CONSTANT i32 31
81    %2:_(s64) = G_LSHR %0, %1
82    $vgpr0_vgpr1 = COPY %2
83...
84
85---
86name:            narrow_lshr_s64_63
87tracksRegLiveness: true
88body:             |
89  bb.0:
90    liveins: $vgpr0_vgpr1
91
92    ; CHECK-LABEL: name: narrow_lshr_s64_63
93    ; CHECK: liveins: $vgpr0_vgpr1
94    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
95    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
96    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
97    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)
98    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
99    ; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LSHR]](s32), [[C1]](s32)
100    ; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
101    %0:_(s64) = COPY $vgpr0_vgpr1
102    %1:_(s32) = G_CONSTANT i32 63
103    %2:_(s64) = G_LSHR %0, %1
104    $vgpr0_vgpr1 = COPY %2
105...
106
107---
108name:            narrow_lshr_s64_64
109tracksRegLiveness: true
110body:             |
111  bb.0:
112    liveins: $vgpr0_vgpr1
113
114    ; CHECK-LABEL: name: narrow_lshr_s64_64
115    ; CHECK: liveins: $vgpr0_vgpr1
116    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
117    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
118    ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C]](s32)
119    ; CHECK: $vgpr0_vgpr1 = COPY [[LSHR]](s64)
120    %0:_(s64) = COPY $vgpr0_vgpr1
121    %1:_(s32) = G_CONSTANT i32 64
122    %2:_(s64) = G_LSHR %0, %1
123    $vgpr0_vgpr1 = COPY %2
124...
125
126---
127name:            narrow_lshr_s64_65
128tracksRegLiveness: true
129body:             |
130  bb.0:
131    liveins: $vgpr0_vgpr1
132
133    ; CHECK-LABEL: name: narrow_lshr_s64_65
134    ; CHECK: liveins: $vgpr0_vgpr1
135    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
136    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65
137    ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C]](s32)
138    ; CHECK: $vgpr0_vgpr1 = COPY [[LSHR]](s64)
139    %0:_(s64) = COPY $vgpr0_vgpr1
140    %1:_(s32) = G_CONSTANT i32 65
141    %2:_(s64) = G_LSHR %0, %1
142    $vgpr0_vgpr1 = COPY %2
143...
144
145---
146name:            narrow_lshr_s32_16
147tracksRegLiveness: true
148body:             |
149  bb.0:
150    liveins: $vgpr0
151
152    ; CHECK-LABEL: name: narrow_lshr_s32_16
153    ; CHECK: liveins: $vgpr0
154    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
155    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
156    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
157    ; CHECK: $vgpr0 = COPY [[LSHR]](s32)
158    %0:_(s32) = COPY $vgpr0
159    %1:_(s32) = G_CONSTANT i32 16
160    %2:_(s32) = G_LSHR %0, %1
161    $vgpr0 = COPY %2
162...
163
164---
165name:            narrow_lshr_s32_17
166tracksRegLiveness: true
167body:             |
168  bb.0:
169    liveins: $vgpr0
170
171    ; CHECK-LABEL: name: narrow_lshr_s32_17
172    ; CHECK: liveins: $vgpr0
173    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
174    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
175    ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
176    ; CHECK: $vgpr0 = COPY [[LSHR]](s32)
177    %0:_(s32) = COPY $vgpr0
178    %1:_(s32) = G_CONSTANT i32 17
179    %2:_(s32) = G_LSHR %0, %1
180    $vgpr0 = COPY %2
181...
182
183---
184name:            narrow_lshr_v2s32_17
185tracksRegLiveness: true
186body:             |
187  bb.0:
188    liveins: $vgpr0_vgpr1
189
190    ; CHECK-LABEL: name: narrow_lshr_v2s32_17
191    ; CHECK: liveins: $vgpr0_vgpr1
192    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
193    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 17
194    ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
195    ; CHECK: [[LSHR:%[0-9]+]]:_(<2 x s32>) = G_LSHR [[COPY]], [[BUILD_VECTOR]](<2 x s32>)
196    ; CHECK: $vgpr0_vgpr1 = COPY [[LSHR]](<2 x s32>)
197    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
198    %1:_(s32) = G_CONSTANT i32 17
199    %2:_(<2 x s32>) = G_BUILD_VECTOR %1, %1
200    %3:_(<2 x s32>) = G_LSHR %0, %2
201    $vgpr0_vgpr1 = COPY %3
202...
203