1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=MOVREL %s 3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GPRIDX %s 4 5--- 6name: insert_vector_elt_s_s32_v2s32 7legalized: true 8regBankSelected: true 9 10body: | 11 bb.0: 12 liveins: $sgpr0_sgpr1, $sgpr2, $sgpr3 13 14 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v2s32 15 ; MOVREL: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1 16 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2 17 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3 18 ; MOVREL: $m0 = COPY [[COPY2]] 19 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V2_:%[0-9]+]]:sreg_64 = S_INDIRECT_REG_WRITE_MOVREL_B32_V2 [[COPY]], [[COPY1]], 3, implicit $m0 20 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V2_]] 21 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v2s32 22 ; GPRIDX: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1 23 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2 24 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3 25 ; GPRIDX: $m0 = COPY [[COPY2]] 26 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V2_:%[0-9]+]]:sreg_64 = S_INDIRECT_REG_WRITE_MOVREL_B32_V2 [[COPY]], [[COPY1]], 3, implicit $m0 27 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V2_]] 28 %0:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1 29 %1:sgpr(s32) = COPY $sgpr2 30 %2:sgpr(s32) = COPY $sgpr3 31 %3:sgpr(<2 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 32 S_ENDPGM 0, implicit %3 33... 34 35--- 36name: insert_vector_elt_s_s32_v3s32 37legalized: true 38regBankSelected: true 39 40body: | 41 bb.0: 42 liveins: $sgpr0_sgpr1_sgpr2, $sgpr3, $sgpr4 43 44 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v3s32 45 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2 46 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 47 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 48 ; MOVREL: $m0 = COPY [[COPY2]] 49 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V3_:%[0-9]+]]:sgpr_96 = S_INDIRECT_REG_WRITE_MOVREL_B32_V3 [[COPY]], [[COPY1]], 3, implicit $m0 50 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V3_]] 51 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v3s32 52 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2 53 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 54 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 55 ; GPRIDX: $m0 = COPY [[COPY2]] 56 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V3_:%[0-9]+]]:sgpr_96 = S_INDIRECT_REG_WRITE_MOVREL_B32_V3 [[COPY]], [[COPY1]], 3, implicit $m0 57 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V3_]] 58 %0:sgpr(<3 x s32>) = COPY $sgpr0_sgpr1_sgpr2 59 %1:sgpr(s32) = COPY $sgpr3 60 %2:sgpr(s32) = COPY $sgpr4 61 %3:sgpr(<3 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 62 S_ENDPGM 0, implicit %3 63... 64 65--- 66name: insert_vector_elt_s_s32_v4s32 67legalized: true 68regBankSelected: true 69 70body: | 71 bb.0: 72 liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, $sgpr5 73 74 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v4s32 75 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 76 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 77 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 78 ; MOVREL: $m0 = COPY [[COPY2]] 79 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V4_:%[0-9]+]]:sgpr_128 = S_INDIRECT_REG_WRITE_MOVREL_B32_V4 [[COPY]], [[COPY1]], 3, implicit $m0 80 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V4_]] 81 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v4s32 82 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 83 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 84 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 85 ; GPRIDX: $m0 = COPY [[COPY2]] 86 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V4_:%[0-9]+]]:sgpr_128 = S_INDIRECT_REG_WRITE_MOVREL_B32_V4 [[COPY]], [[COPY1]], 3, implicit $m0 87 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V4_]] 88 %0:sgpr(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 89 %1:sgpr(s32) = COPY $sgpr3 90 %2:sgpr(s32) = COPY $sgpr4 91 %3:sgpr(<4 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 92 S_ENDPGM 0, implicit %3 93... 94 95--- 96name: insert_vector_elt_s_s32_v5s32 97legalized: true 98regBankSelected: true 99 100body: | 101 bb.0: 102 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4, $sgpr5, $sgpr6 103 104 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v5s32 105 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_160 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 106 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5 107 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr6 108 ; MOVREL: $m0 = COPY [[COPY2]] 109 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V5_:%[0-9]+]]:sgpr_160 = S_INDIRECT_REG_WRITE_MOVREL_B32_V5 [[COPY]], [[COPY1]], 3, implicit $m0 110 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V5_]] 111 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v5s32 112 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_160 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 113 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5 114 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr6 115 ; GPRIDX: $m0 = COPY [[COPY2]] 116 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V5_:%[0-9]+]]:sgpr_160 = S_INDIRECT_REG_WRITE_MOVREL_B32_V5 [[COPY]], [[COPY1]], 3, implicit $m0 117 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V5_]] 118 %0:sgpr(<5 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 119 %1:sgpr(s32) = COPY $sgpr5 120 %2:sgpr(s32) = COPY $sgpr6 121 %3:sgpr(<5 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 122 S_ENDPGM 0, implicit %3 123... 124 125--- 126name: insert_vector_elt_s_s32_v8s32 127legalized: true 128regBankSelected: true 129 130body: | 131 bb.0: 132 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8, $sgpr9 133 134 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v8s32 135 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 136 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8 137 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 138 ; MOVREL: $m0 = COPY [[COPY2]] 139 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:sgpr_256 = S_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 3, implicit $m0 140 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 141 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v8s32 142 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 143 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8 144 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 145 ; GPRIDX: $m0 = COPY [[COPY2]] 146 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:sgpr_256 = S_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 3, implicit $m0 147 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 148 %0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 149 %1:sgpr(s32) = COPY $sgpr8 150 %2:sgpr(s32) = COPY $sgpr9 151 %3:sgpr(<8 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 152 S_ENDPGM 0, implicit %3 153... 154 155--- 156name: insert_vector_elt_s_s32_v16s32 157legalized: true 158regBankSelected: true 159 160body: | 161 bb.0: 162 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, $sgpr16, $sgpr17 163 164 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v16s32 165 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 166 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr16 167 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr17 168 ; MOVREL: $m0 = COPY [[COPY2]] 169 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V16_:%[0-9]+]]:sgpr_512 = S_INDIRECT_REG_WRITE_MOVREL_B32_V16 [[COPY]], [[COPY1]], 3, implicit $m0 170 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V16_]] 171 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v16s32 172 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 173 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr16 174 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr17 175 ; GPRIDX: $m0 = COPY [[COPY2]] 176 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V16_:%[0-9]+]]:sgpr_512 = S_INDIRECT_REG_WRITE_MOVREL_B32_V16 [[COPY]], [[COPY1]], 3, implicit $m0 177 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V16_]] 178 %0:sgpr(<16 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 179 %1:sgpr(s32) = COPY $sgpr16 180 %2:sgpr(s32) = COPY $sgpr17 181 %3:sgpr(<16 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 182 S_ENDPGM 0, implicit %3 183... 184 185--- 186name: extract_vector_elt_s_s32_v32s32 187legalized: true 188regBankSelected: true 189 190body: | 191 bb.0: 192 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, $sgpr40, $sgpr41 193 194 ; MOVREL-LABEL: name: extract_vector_elt_s_s32_v32s32 195 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_1024 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 196 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr40 197 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr41 198 ; MOVREL: $m0 = COPY [[COPY2]] 199 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V32_:%[0-9]+]]:sgpr_1024 = S_INDIRECT_REG_WRITE_MOVREL_B32_V32 [[COPY]], [[COPY1]], 3, implicit $m0 200 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V32_]] 201 ; GPRIDX-LABEL: name: extract_vector_elt_s_s32_v32s32 202 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_1024 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 203 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr40 204 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr41 205 ; GPRIDX: $m0 = COPY [[COPY2]] 206 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V32_:%[0-9]+]]:sgpr_1024 = S_INDIRECT_REG_WRITE_MOVREL_B32_V32 [[COPY]], [[COPY1]], 3, implicit $m0 207 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V32_]] 208 %0:sgpr(<32 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 209 %1:sgpr(s32) = COPY $sgpr40 210 %2:sgpr(s32) = COPY $sgpr41 211 %3:sgpr(<32 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 212 S_ENDPGM 0, implicit %3 213... 214 215--- 216name: insert_vector_elt_s_s64_v2s64 217legalized: true 218regBankSelected: true 219 220body: | 221 bb.0: 222 liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4_sgpr5, $sgpr6 223 224 ; MOVREL-LABEL: name: insert_vector_elt_s_s64_v2s64 225 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 226 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5 227 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr6 228 ; MOVREL: $m0 = COPY [[COPY2]] 229 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B64_V2_:%[0-9]+]]:sgpr_128 = S_INDIRECT_REG_WRITE_MOVREL_B64_V2 [[COPY]], [[COPY1]], 4, implicit $m0 230 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B64_V2_]] 231 ; GPRIDX-LABEL: name: insert_vector_elt_s_s64_v2s64 232 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 233 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5 234 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr6 235 ; GPRIDX: $m0 = COPY [[COPY2]] 236 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B64_V2_:%[0-9]+]]:sgpr_128 = S_INDIRECT_REG_WRITE_MOVREL_B64_V2 [[COPY]], [[COPY1]], 4, implicit $m0 237 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B64_V2_]] 238 %0:sgpr(<2 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 239 %1:sgpr(s64) = COPY $sgpr4_sgpr5 240 %2:sgpr(s32) = COPY $sgpr6 241 %3:sgpr(<2 x s64>) = G_INSERT_VECTOR_ELT %0, %1, %2 242 S_ENDPGM 0, implicit %3 243... 244 245--- 246name: insert_vector_elt_s_s64_v4s64 247legalized: true 248regBankSelected: true 249 250body: | 251 bb.0: 252 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10 253 254 ; MOVREL-LABEL: name: insert_vector_elt_s_s64_v4s64 255 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 256 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9 257 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr10 258 ; MOVREL: $m0 = COPY [[COPY2]] 259 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B64_V4_:%[0-9]+]]:sgpr_256 = S_INDIRECT_REG_WRITE_MOVREL_B64_V4 [[COPY]], [[COPY1]], 4, implicit $m0 260 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B64_V4_]] 261 ; GPRIDX-LABEL: name: insert_vector_elt_s_s64_v4s64 262 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 263 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9 264 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr10 265 ; GPRIDX: $m0 = COPY [[COPY2]] 266 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B64_V4_:%[0-9]+]]:sgpr_256 = S_INDIRECT_REG_WRITE_MOVREL_B64_V4 [[COPY]], [[COPY1]], 4, implicit $m0 267 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B64_V4_]] 268 %0:sgpr(<4 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 269 %1:sgpr(s64) = COPY $sgpr8_sgpr9 270 %2:sgpr(s32) = COPY $sgpr10 271 %3:sgpr(<4 x s64>) = G_INSERT_VECTOR_ELT %0, %1, %2 272 S_ENDPGM 0, implicit %3 273... 274 275--- 276name: insert_vector_elt_s_s64_v8s64 277legalized: true 278regBankSelected: true 279 280body: | 281 bb.0: 282 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, $sgpr16_sgpr17, $sgpr18 283 284 ; MOVREL-LABEL: name: insert_vector_elt_s_s64_v8s64 285 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 286 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr16_sgpr17 287 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr18 288 ; MOVREL: $m0 = COPY [[COPY2]] 289 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B64_V8_:%[0-9]+]]:sgpr_512 = S_INDIRECT_REG_WRITE_MOVREL_B64_V8 [[COPY]], [[COPY1]], 4, implicit $m0 290 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B64_V8_]] 291 ; GPRIDX-LABEL: name: insert_vector_elt_s_s64_v8s64 292 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_512 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 293 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr16_sgpr17 294 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr18 295 ; GPRIDX: $m0 = COPY [[COPY2]] 296 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B64_V8_:%[0-9]+]]:sgpr_512 = S_INDIRECT_REG_WRITE_MOVREL_B64_V8 [[COPY]], [[COPY1]], 4, implicit $m0 297 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B64_V8_]] 298 %0:sgpr(<8 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 299 %1:sgpr(s64) = COPY $sgpr16_sgpr17 300 %2:sgpr(s32) = COPY $sgpr18 301 %3:sgpr(<8 x s64>) = G_INSERT_VECTOR_ELT %0, %1, %2 302 S_ENDPGM 0, implicit %3 303... 304 305--- 306name: extract_vector_elt_s_s64_v16s64 307legalized: true 308regBankSelected: true 309 310body: | 311 bb.0: 312 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, $sgpr40_sgpr41, $sgpr42 313 314 ; MOVREL-LABEL: name: extract_vector_elt_s_s64_v16s64 315 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_1024 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 316 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr40_sgpr41 317 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr42 318 ; MOVREL: $m0 = COPY [[COPY2]] 319 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B64_V16_:%[0-9]+]]:sgpr_1024 = S_INDIRECT_REG_WRITE_MOVREL_B64_V16 [[COPY]], [[COPY1]], 4, implicit $m0 320 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B64_V16_]] 321 ; GPRIDX-LABEL: name: extract_vector_elt_s_s64_v16s64 322 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_1024 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 323 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr40_sgpr41 324 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr42 325 ; GPRIDX: $m0 = COPY [[COPY2]] 326 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B64_V16_:%[0-9]+]]:sgpr_1024 = S_INDIRECT_REG_WRITE_MOVREL_B64_V16 [[COPY]], [[COPY1]], 4, implicit $m0 327 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B64_V16_]] 328 %0:sgpr(<16 x s64>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 329 %1:sgpr(s64) = COPY $sgpr40_sgpr41 330 %2:sgpr(s32) = COPY $sgpr42 331 %3:sgpr(<16 x s64>) = G_INSERT_VECTOR_ELT %0, %1, %2 332 S_ENDPGM 0, implicit %3 333... 334 335--- 336name: insert_vector_elt_vvs_s32_v2s32 337legalized: true 338regBankSelected: true 339 340body: | 341 bb.0: 342 liveins: $vgpr0_vgpr1, $vgpr2, $sgpr3 343 344 ; MOVREL-LABEL: name: insert_vector_elt_vvs_s32_v2s32 345 ; MOVREL: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 346 ; MOVREL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2 347 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3 348 ; MOVREL: $m0 = COPY [[COPY2]] 349 ; MOVREL: [[V_INDIRECT_REG_WRITE_MOVREL_B32_V2_:%[0-9]+]]:vreg_64 = V_INDIRECT_REG_WRITE_MOVREL_B32_V2 [[COPY]], [[COPY1]], 3, implicit $m0, implicit $exec 350 ; MOVREL: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_MOVREL_B32_V2_]] 351 ; GPRIDX-LABEL: name: insert_vector_elt_vvs_s32_v2s32 352 ; GPRIDX: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1 353 ; GPRIDX: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2 354 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3 355 ; GPRIDX: [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V2_:%[0-9]+]]:vreg_64 = V_INDIRECT_REG_WRITE_GPR_IDX_B32_V2 [[COPY]], [[COPY1]], [[COPY2]], 3, implicit-def $m0, implicit $m0, implicit $exec 356 ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V2_]] 357 %0:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1 358 %1:vgpr(s32) = COPY $vgpr2 359 %2:sgpr(s32) = COPY $sgpr3 360 %3:vgpr(<2 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 361 S_ENDPGM 0, implicit %3 362... 363 364--- 365name: insert_vector_elt_vvs_s32_v3s32 366legalized: true 367regBankSelected: true 368 369body: | 370 bb.0: 371 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3, $sgpr4 372 373 ; MOVREL-LABEL: name: insert_vector_elt_vvs_s32_v3s32 374 ; MOVREL: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 375 ; MOVREL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr3 376 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 377 ; MOVREL: $m0 = COPY [[COPY2]] 378 ; MOVREL: [[V_INDIRECT_REG_WRITE_MOVREL_B32_V3_:%[0-9]+]]:vreg_96 = V_INDIRECT_REG_WRITE_MOVREL_B32_V3 [[COPY]], [[COPY1]], 3, implicit $m0, implicit $exec 379 ; MOVREL: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_MOVREL_B32_V3_]] 380 ; GPRIDX-LABEL: name: insert_vector_elt_vvs_s32_v3s32 381 ; GPRIDX: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2 382 ; GPRIDX: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr3 383 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 384 ; GPRIDX: [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V3_:%[0-9]+]]:vreg_96 = V_INDIRECT_REG_WRITE_GPR_IDX_B32_V3 [[COPY]], [[COPY1]], [[COPY2]], 3, implicit-def $m0, implicit $m0, implicit $exec 385 ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V3_]] 386 %0:vgpr(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 387 %1:vgpr(s32) = COPY $vgpr3 388 %2:sgpr(s32) = COPY $sgpr4 389 %3:vgpr(<3 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 390 S_ENDPGM 0, implicit %3 391... 392 393--- 394name: insert_vector_elt_vvs_s32_v4s32 395legalized: true 396regBankSelected: true 397 398body: | 399 bb.0: 400 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4, $vgpr5 401 402 ; MOVREL-LABEL: name: insert_vector_elt_vvs_s32_v4s32 403 ; MOVREL: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 404 ; MOVREL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr3 405 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 406 ; MOVREL: $m0 = COPY [[COPY2]] 407 ; MOVREL: [[V_INDIRECT_REG_WRITE_MOVREL_B32_V4_:%[0-9]+]]:vreg_128 = V_INDIRECT_REG_WRITE_MOVREL_B32_V4 [[COPY]], [[COPY1]], 3, implicit $m0, implicit $exec 408 ; MOVREL: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_MOVREL_B32_V4_]] 409 ; GPRIDX-LABEL: name: insert_vector_elt_vvs_s32_v4s32 410 ; GPRIDX: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3 411 ; GPRIDX: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr3 412 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 413 ; GPRIDX: [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V4_:%[0-9]+]]:vreg_128 = V_INDIRECT_REG_WRITE_GPR_IDX_B32_V4 [[COPY]], [[COPY1]], [[COPY2]], 3, implicit-def $m0, implicit $m0, implicit $exec 414 ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V4_]] 415 %0:vgpr(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 416 %1:vgpr(s32) = COPY $vgpr3 417 %2:sgpr(s32) = COPY $sgpr4 418 %3:vgpr(<4 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 419 S_ENDPGM 0, implicit %3 420... 421 422--- 423name: insert_vector_elt_vvs_s32_v5s32 424legalized: true 425regBankSelected: true 426 427body: | 428 bb.0: 429 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, $vgpr5, $sgpr6 430 431 ; MOVREL-LABEL: name: insert_vector_elt_vvs_s32_v5s32 432 ; MOVREL: [[COPY:%[0-9]+]]:vreg_160 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 433 ; MOVREL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr5 434 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr6 435 ; MOVREL: $m0 = COPY [[COPY2]] 436 ; MOVREL: [[V_INDIRECT_REG_WRITE_MOVREL_B32_V5_:%[0-9]+]]:vreg_160 = V_INDIRECT_REG_WRITE_MOVREL_B32_V5 [[COPY]], [[COPY1]], 3, implicit $m0, implicit $exec 437 ; MOVREL: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_MOVREL_B32_V5_]] 438 ; GPRIDX-LABEL: name: insert_vector_elt_vvs_s32_v5s32 439 ; GPRIDX: [[COPY:%[0-9]+]]:vreg_160 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 440 ; GPRIDX: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr5 441 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr6 442 ; GPRIDX: [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V5_:%[0-9]+]]:vreg_160 = V_INDIRECT_REG_WRITE_GPR_IDX_B32_V5 [[COPY]], [[COPY1]], [[COPY2]], 3, implicit-def $m0, implicit $m0, implicit $exec 443 ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V5_]] 444 %0:vgpr(<5 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 445 %1:vgpr(s32) = COPY $vgpr5 446 %2:sgpr(s32) = COPY $sgpr6 447 %3:vgpr(<5 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 448 S_ENDPGM 0, implicit %3 449... 450 451--- 452name: insert_vector_elt_vvs_s32_v8s32 453legalized: true 454regBankSelected: true 455 456body: | 457 bb.0: 458 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8, $sgpr9 459 460 ; MOVREL-LABEL: name: insert_vector_elt_vvs_s32_v8s32 461 ; MOVREL: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 462 ; MOVREL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr8 463 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 464 ; MOVREL: $m0 = COPY [[COPY2]] 465 ; MOVREL: [[V_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:vreg_256 = V_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 3, implicit $m0, implicit $exec 466 ; MOVREL: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 467 ; GPRIDX-LABEL: name: insert_vector_elt_vvs_s32_v8s32 468 ; GPRIDX: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 469 ; GPRIDX: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr8 470 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 471 ; GPRIDX: [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8_:%[0-9]+]]:vreg_256 = V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8 [[COPY]], [[COPY1]], [[COPY2]], 3, implicit-def $m0, implicit $m0, implicit $exec 472 ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8_]] 473 %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 474 %1:vgpr(s32) = COPY $vgpr8 475 %2:sgpr(s32) = COPY $sgpr9 476 %3:vgpr(<8 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 477 S_ENDPGM 0, implicit %3 478... 479 480--- 481name: insert_vector_elt_vvs_s32_v8s32_add_1 482legalized: true 483regBankSelected: true 484 485body: | 486 bb.0: 487 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8, $sgpr9 488 489 ; MOVREL-LABEL: name: insert_vector_elt_vvs_s32_v8s32_add_1 490 ; MOVREL: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 491 ; MOVREL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr8 492 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 493 ; MOVREL: $m0 = COPY [[COPY2]] 494 ; MOVREL: [[V_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:vreg_256 = V_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 11, implicit $m0, implicit $exec 495 ; MOVREL: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 496 ; GPRIDX-LABEL: name: insert_vector_elt_vvs_s32_v8s32_add_1 497 ; GPRIDX: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 498 ; GPRIDX: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr8 499 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 500 ; GPRIDX: [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8_:%[0-9]+]]:vreg_256 = V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8 [[COPY]], [[COPY1]], [[COPY2]], 11, implicit-def $m0, implicit $m0, implicit $exec 501 ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8_]] 502 %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 503 %1:vgpr(s32) = COPY $vgpr8 504 %2:sgpr(s32) = COPY $sgpr9 505 %3:sgpr(s32) = G_CONSTANT i32 1 506 %4:sgpr(s32) = G_ADD %2, %3 507 %5:vgpr(<8 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %4 508 S_ENDPGM 0, implicit %5 509... 510 511--- 512name: insert_vector_elt_vvs_s32_v8s32_add_8 513legalized: true 514regBankSelected: true 515 516body: | 517 bb.0: 518 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8, $sgpr9 519 520 ; MOVREL-LABEL: name: insert_vector_elt_vvs_s32_v8s32_add_8 521 ; MOVREL: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 522 ; MOVREL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr8 523 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 524 ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 8 525 ; MOVREL: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 526 ; MOVREL: $m0 = COPY [[S_ADD_I32_]] 527 ; MOVREL: [[V_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:vreg_256 = V_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 3, implicit $m0, implicit $exec 528 ; MOVREL: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 529 ; GPRIDX-LABEL: name: insert_vector_elt_vvs_s32_v8s32_add_8 530 ; GPRIDX: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 531 ; GPRIDX: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr8 532 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 533 ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 8 534 ; GPRIDX: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 535 ; GPRIDX: [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8_:%[0-9]+]]:vreg_256 = V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8 [[COPY]], [[COPY1]], [[S_ADD_I32_]], 3, implicit-def $m0, implicit $m0, implicit $exec 536 ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V8_]] 537 %0:vgpr(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 538 %1:vgpr(s32) = COPY $vgpr8 539 %2:sgpr(s32) = COPY $sgpr9 540 %3:sgpr(s32) = G_CONSTANT i32 8 541 %4:sgpr(s32) = G_ADD %2, %3 542 %5:vgpr(<8 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %4 543 S_ENDPGM 0, implicit %5 544... 545 546--- 547name: insert_vector_elt_s_s32_v8s32_add_1 548legalized: true 549regBankSelected: true 550 551body: | 552 bb.0: 553 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8, $sgpr9 554 555 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v8s32_add_1 556 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 557 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8 558 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 559 ; MOVREL: $m0 = COPY [[COPY2]] 560 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:sgpr_256 = S_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 11, implicit $m0 561 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 562 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v8s32_add_1 563 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 564 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8 565 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 566 ; GPRIDX: $m0 = COPY [[COPY2]] 567 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:sgpr_256 = S_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 11, implicit $m0 568 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 569 %0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 570 %1:sgpr(s32) = COPY $sgpr8 571 %2:sgpr(s32) = COPY $sgpr9 572 %3:sgpr(s32) = G_CONSTANT i32 1 573 %4:sgpr(s32) = G_ADD %2, %3 574 %5:sgpr(<8 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %4 575 S_ENDPGM 0, implicit %5 576... 577 578--- 579name: insert_vector_elt_s_s32_v8s32_add_8 580legalized: true 581regBankSelected: true 582 583body: | 584 bb.0: 585 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8, $sgpr9 586 587 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v8s32_add_8 588 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 589 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8 590 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 591 ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 8 592 ; MOVREL: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 593 ; MOVREL: $m0 = COPY [[S_ADD_I32_]] 594 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:sgpr_256 = S_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 3, implicit $m0 595 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 596 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v8s32_add_8 597 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 598 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8 599 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9 600 ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 8 601 ; GPRIDX: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 602 ; GPRIDX: $m0 = COPY [[S_ADD_I32_]] 603 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_:%[0-9]+]]:sgpr_256 = S_INDIRECT_REG_WRITE_MOVREL_B32_V8 [[COPY]], [[COPY1]], 3, implicit $m0 604 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V8_]] 605 %0:sgpr(<8 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 606 %1:sgpr(s32) = COPY $sgpr8 607 %2:sgpr(s32) = COPY $sgpr9 608 %3:sgpr(s32) = G_CONSTANT i32 8 609 %4:sgpr(s32) = G_ADD %2, %3 610 %5:sgpr(<8 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %4 611 S_ENDPGM 0, implicit %5 612... 613 614# This should have been folded out in the legalizer, but make sure it 615# doesn't crash. 616--- 617name: insert_vector_elt_s_s32_v4s32_const_idx 618legalized: true 619regBankSelected: true 620 621body: | 622 bb.0: 623 liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4 624 625 ; MOVREL-LABEL: name: insert_vector_elt_s_s32_v4s32_const_idx 626 ; MOVREL: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 627 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4 628 ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 629 ; MOVREL: $m0 = COPY [[S_MOV_B32_]] 630 ; MOVREL: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V4_:%[0-9]+]]:sgpr_128 = S_INDIRECT_REG_WRITE_MOVREL_B32_V4 [[COPY]], [[COPY1]], 3, implicit $m0 631 ; MOVREL: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V4_]] 632 ; GPRIDX-LABEL: name: insert_vector_elt_s_s32_v4s32_const_idx 633 ; GPRIDX: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 634 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4 635 ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 636 ; GPRIDX: $m0 = COPY [[S_MOV_B32_]] 637 ; GPRIDX: [[S_INDIRECT_REG_WRITE_MOVREL_B32_V4_:%[0-9]+]]:sgpr_128 = S_INDIRECT_REG_WRITE_MOVREL_B32_V4 [[COPY]], [[COPY1]], 3, implicit $m0 638 ; GPRIDX: S_ENDPGM 0, implicit [[S_INDIRECT_REG_WRITE_MOVREL_B32_V4_]] 639 %0:sgpr(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 640 %1:sgpr(s32) = COPY $sgpr4 641 %2:sgpr(s32) = G_CONSTANT i32 0 642 %3:sgpr(<4 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 643 S_ENDPGM 0, implicit %3 644... 645 646--- 647name: insert_vector_elt_v_s32_v4s32_const_idx 648legalized: true 649regBankSelected: true 650 651body: | 652 bb.0: 653 liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4 654 655 ; MOVREL-LABEL: name: insert_vector_elt_v_s32_v4s32_const_idx 656 ; MOVREL: [[COPY:%[0-9]+]]:vreg_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 657 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4 658 ; MOVREL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 659 ; MOVREL: $m0 = COPY [[S_MOV_B32_]] 660 ; MOVREL: [[V_INDIRECT_REG_WRITE_MOVREL_B32_V4_:%[0-9]+]]:vreg_128 = V_INDIRECT_REG_WRITE_MOVREL_B32_V4 [[COPY]], [[COPY1]], 3, implicit $m0, implicit $exec 661 ; MOVREL: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_MOVREL_B32_V4_]] 662 ; GPRIDX-LABEL: name: insert_vector_elt_v_s32_v4s32_const_idx 663 ; GPRIDX: [[COPY:%[0-9]+]]:vreg_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 664 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr4 665 ; GPRIDX: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 666 ; GPRIDX: [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V4_:%[0-9]+]]:vreg_128 = V_INDIRECT_REG_WRITE_GPR_IDX_B32_V4 [[COPY]], [[COPY1]], [[S_MOV_B32_]], 3, implicit-def $m0, implicit $m0, implicit $exec 667 ; GPRIDX: S_ENDPGM 0, implicit [[V_INDIRECT_REG_WRITE_GPR_IDX_B32_V4_]] 668 %0:vgpr(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3 669 %1:sgpr(s32) = COPY $sgpr4 670 %2:sgpr(s32) = G_CONSTANT i32 0 671 %3:vgpr(<4 x s32>) = G_INSERT_VECTOR_ELT %0, %1, %2 672 S_ENDPGM 0, implicit %3 673... 674