1; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope %s 2 3; creating v4i16->v4f16 and v4f16->v4i16 bitcasts in the selection DAG is rather 4; difficult, so this test has to throw in some llvm.amdgcn.wqm to get them 5 6; CHECK-LABEL: {{^}}test_to_i16: 7; CHECK: s_endpgm 8define amdgpu_ps void @test_to_i16(<4 x i32> inreg, <4 x half> inreg) #0 { 9 %a_tmp = call <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half> %1) 10 %a_i16_tmp = bitcast <4 x half> %a_tmp to <4 x i16> 11 %a_i16 = call <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16> %a_i16_tmp) 12 13 %a_i32 = bitcast <4 x i16> %a_i16 to <2 x i32> 14 call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> %a_i32, <4 x i32> %0, i32 0, i32 0, i32 0) 15 ret void 16} 17 18; CHECK-LABEL: {{^}}test_to_half: 19; CHECK: s_endpgm 20define amdgpu_ps void @test_to_half(<4 x i32> inreg, <4 x i16> inreg) #0 { 21 %a_tmp = call <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16> %1) 22 %a_half_tmp = bitcast <4 x i16> %a_tmp to <4 x half> 23 %a_half = call <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half> %a_half_tmp) 24 25 %a_i32 = bitcast <4 x half> %a_half to <2 x i32> 26 call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> %a_i32, <4 x i32> %0, i32 0, i32 0, i32 0) 27 ret void 28} 29 30declare <4 x half> @llvm.amdgcn.wqm.v4f16(<4 x half>) #1 31declare <4 x i16> @llvm.amdgcn.wqm.v4i16(<4 x i16>) #1 32declare void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32>, <4 x i32>, i32, i32, i32) #0 33 34attributes #0 = { nounwind } 35attributes #1 = { nounwind readonly } 36