1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple arm-eabi -mattr=+v6t2 | FileCheck %s 3 4define i4 @parity_4(i4 %x) { 5; CHECK-LABEL: parity_4: 6; CHECK: @ %bb.0: 7; CHECK-NEXT: and r0, r0, #15 8; CHECK-NEXT: eor r0, r0, r0, lsr #2 9; CHECK-NEXT: eor r0, r0, r0, lsr #1 10; CHECK-NEXT: and r0, r0, #1 11; CHECK-NEXT: bx lr 12 %1 = tail call i4 @llvm.ctpop.i4(i4 %x) 13 %2 = and i4 %1, 1 14 ret i4 %2 15} 16 17define i8 @parity_8(i8 %x) { 18; CHECK-LABEL: parity_8: 19; CHECK: @ %bb.0: 20; CHECK-NEXT: uxtb r0, r0 21; CHECK-NEXT: eor r0, r0, r0, lsr #4 22; CHECK-NEXT: eor r0, r0, r0, lsr #2 23; CHECK-NEXT: eor r0, r0, r0, lsr #1 24; CHECK-NEXT: and r0, r0, #1 25; CHECK-NEXT: bx lr 26 %1 = tail call i8 @llvm.ctpop.i8(i8 %x) 27 %2 = and i8 %1, 1 28 ret i8 %2 29} 30 31define i16 @parity_16(i16 %x) { 32; CHECK-LABEL: parity_16: 33; CHECK: @ %bb.0: 34; CHECK-NEXT: uxth r0, r0 35; CHECK-NEXT: eor r0, r0, r0, lsr #8 36; CHECK-NEXT: eor r0, r0, r0, lsr #4 37; CHECK-NEXT: eor r0, r0, r0, lsr #2 38; CHECK-NEXT: eor r0, r0, r0, lsr #1 39; CHECK-NEXT: and r0, r0, #1 40; CHECK-NEXT: bx lr 41 %1 = tail call i16 @llvm.ctpop.i16(i16 %x) 42 %2 = and i16 %1, 1 43 ret i16 %2 44} 45 46define i17 @parity_17(i17 %x) { 47; CHECK-LABEL: parity_17: 48; CHECK: @ %bb.0: 49; CHECK-NEXT: bfc r0, #17, #15 50; CHECK-NEXT: eor r0, r0, r0, lsr #16 51; CHECK-NEXT: eor r0, r0, r0, lsr #8 52; CHECK-NEXT: eor r0, r0, r0, lsr #4 53; CHECK-NEXT: eor r0, r0, r0, lsr #2 54; CHECK-NEXT: eor r0, r0, r0, lsr #1 55; CHECK-NEXT: and r0, r0, #1 56; CHECK-NEXT: bx lr 57 %1 = tail call i17 @llvm.ctpop.i17(i17 %x) 58 %2 = and i17 %1, 1 59 ret i17 %2 60} 61 62define i32 @parity_32(i32 %x) { 63; CHECK-LABEL: parity_32: 64; CHECK: @ %bb.0: 65; CHECK-NEXT: eor r0, r0, r0, lsr #16 66; CHECK-NEXT: eor r0, r0, r0, lsr #8 67; CHECK-NEXT: eor r0, r0, r0, lsr #4 68; CHECK-NEXT: eor r0, r0, r0, lsr #2 69; CHECK-NEXT: eor r0, r0, r0, lsr #1 70; CHECK-NEXT: and r0, r0, #1 71; CHECK-NEXT: bx lr 72 %1 = tail call i32 @llvm.ctpop.i32(i32 %x) 73 %2 = and i32 %1, 1 74 ret i32 %2 75} 76 77define i64 @parity_64(i64 %x) { 78; CHECK-LABEL: parity_64: 79; CHECK: @ %bb.0: 80; CHECK-NEXT: eor r0, r0, r1 81; CHECK-NEXT: mov r1, #0 82; CHECK-NEXT: eor r0, r0, r0, lsr #16 83; CHECK-NEXT: eor r0, r0, r0, lsr #8 84; CHECK-NEXT: eor r0, r0, r0, lsr #4 85; CHECK-NEXT: eor r0, r0, r0, lsr #2 86; CHECK-NEXT: eor r0, r0, r0, lsr #1 87; CHECK-NEXT: and r0, r0, #1 88; CHECK-NEXT: bx lr 89 %1 = tail call i64 @llvm.ctpop.i64(i64 %x) 90 %2 = and i64 %1, 1 91 ret i64 %2 92} 93 94define i32 @parity_64_trunc(i64 %x) { 95; CHECK-LABEL: parity_64_trunc: 96; CHECK: @ %bb.0: 97; CHECK-NEXT: eor r0, r0, r1 98; CHECK-NEXT: eor r0, r0, r0, lsr #16 99; CHECK-NEXT: eor r0, r0, r0, lsr #8 100; CHECK-NEXT: eor r0, r0, r0, lsr #4 101; CHECK-NEXT: eor r0, r0, r0, lsr #2 102; CHECK-NEXT: eor r0, r0, r0, lsr #1 103; CHECK-NEXT: and r0, r0, #1 104; CHECK-NEXT: bx lr 105 %1 = tail call i64 @llvm.ctpop.i64(i64 %x) 106 %2 = trunc i64 %1 to i32 107 %3 = and i32 %2, 1 108 ret i32 %3 109} 110 111define i8 @parity_32_trunc(i32 %x) { 112; CHECK-LABEL: parity_32_trunc: 113; CHECK: @ %bb.0: 114; CHECK-NEXT: eor r0, r0, r0, lsr #16 115; CHECK-NEXT: eor r0, r0, r0, lsr #8 116; CHECK-NEXT: eor r0, r0, r0, lsr #4 117; CHECK-NEXT: eor r0, r0, r0, lsr #2 118; CHECK-NEXT: eor r0, r0, r0, lsr #1 119; CHECK-NEXT: and r0, r0, #1 120; CHECK-NEXT: bx lr 121 %1 = tail call i32 @llvm.ctpop.i32(i32 %x) 122 %2 = trunc i32 %1 to i8 123 %3 = and i8 %2, 1 124 ret i8 %3 125} 126 127define i32 @parity_8_zext(i8 %x) { 128; CHECK-LABEL: parity_8_zext: 129; CHECK: @ %bb.0: 130; CHECK-NEXT: uxtb r0, r0 131; CHECK-NEXT: eor r0, r0, r0, lsr #4 132; CHECK-NEXT: eor r0, r0, r0, lsr #2 133; CHECK-NEXT: eor r0, r0, r0, lsr #1 134; CHECK-NEXT: and r0, r0, #1 135; CHECK-NEXT: bx lr 136 %a = zext i8 %x to i32 137 %b = tail call i32 @llvm.ctpop.i32(i32 %a) 138 %c = and i32 %b, 1 139 ret i32 %c 140} 141 142define i32 @parity_8_mask(i32 %x) { 143; CHECK-LABEL: parity_8_mask: 144; CHECK: @ %bb.0: 145; CHECK-NEXT: uxtb r0, r0 146; CHECK-NEXT: eor r0, r0, r0, lsr #4 147; CHECK-NEXT: eor r0, r0, r0, lsr #2 148; CHECK-NEXT: eor r0, r0, r0, lsr #1 149; CHECK-NEXT: and r0, r0, #1 150; CHECK-NEXT: bx lr 151 %a = and i32 %x, 255 152 %b = tail call i32 @llvm.ctpop.i32(i32 %a) 153 %c = and i32 %b, 1 154 ret i32 %c 155} 156 157declare i4 @llvm.ctpop.i4(i4 %x) 158declare i8 @llvm.ctpop.i8(i8 %x) 159declare i16 @llvm.ctpop.i16(i16 %x) 160declare i17 @llvm.ctpop.i17(i17 %x) 161declare i32 @llvm.ctpop.i32(i32 %x) 162declare i64 @llvm.ctpop.i64(i64 %x) 163