1; RUN: llc -mtriple armv7 -target-abi apcs -O0 -o - < %s \ 2; RUN: | FileCheck %s -check-prefix CHECK-TAIL -check-prefix CHECK 3; RUN: llc -mtriple armv7 -target-abi apcs -O0 -disable-tail-calls -o - < %s \ 4; RUN: | FileCheck %s -check-prefix CHECK-NO-TAIL -check-prefix CHECK 5; RUN: llc -mtriple armv7 -target-abi aapcs -O0 -o - < %s \ 6; RUN: | FileCheck %s -check-prefix CHECK-TAIL-AAPCS -check-prefix CHECK 7 8declare i32 @callee(i32 %i) 9declare extern_weak fastcc void @callee_weak() 10 11define i32 @caller(i32 %i) { 12entry: 13 %r = tail call i32 @callee(i32 %i) 14 ret i32 %r 15} 16 17; CHECK-TAIL-LABEL: caller 18; CHECK-TAIL: b callee 19 20; CHECK-NO-TAIL-LABEL: caller 21; CHECK-NO-TAIL: push {lr} 22; CHECK-NO-TAIL: bl callee 23; CHECK-NO-TAIL: pop {lr} 24; CHECK-NO-TAIL: bx lr 25 26 27; Weakly-referenced extern functions cannot be tail-called, as AAELF does 28; not define the behaviour of branch instructions to undefined weak symbols. 29define fastcc void @caller_weak() { 30; CHECK-LABEL: caller_weak: 31; CHECK: bl callee_weak 32 tail call void @callee_weak() 33 ret void 34} 35 36; A tail call can be optimized if all the arguments can be passed in registers 37; R0-R3, or the remaining arguments are already in the caller's parameter area 38; in the stack. Variadic functions are no different. 39declare i32 @variadic(i32, ...) 40 41; e.g. four integers 42define void @v_caller_ints1(i32 %a, i32 %b) { 43; CHECK-LABEL: v_caller_ints1: 44; CHECK-TAIL: b variadic 45; CHECK-TAIL-AAPCS: b variadic 46; CHECK-NO-TAIL: bl variadic 47entry: 48 %call = tail call i32 (i32, ...) @variadic(i32 %a, i32 %b, i32 %b, i32 %a) 49 ret void 50} 51 52; e.g. two 32-bit integers, one 64-bit integer (needs to span two regs) 53define void @v_caller_ints2(i32 %y, i64 %z) { 54; CHECK-LABEL: v_caller_ints2: 55; CHECK-TAIL: b variadic 56; CHECK-TAIL-AAPCS: b variadic 57; CHECK-NO-TAIL: bl variadic 58entry: 59 %call = tail call i32 (i32, ...) @variadic(i32 %y, i32 %y, i64 %z) 60 ret void 61} 62 63; e.g. two 32-bit integers, one 64-bit integer (needs to span two regs). Notice 64; that %z is passed in r1-r2 if APCS is used, contrary to AAPCS where r2-r3 65; would be used (since double-word types must start at an even register). In the 66; latter case, the third argument needs to be passed through the stack. 67define void @v_caller_ints3(i32 %y, i64 %z) { 68; CHECK-LABEL: v_caller_ints3: 69; CHECK-TAIL: b variadic 70; CHECK-TAIL-AAPCS: bl variadic 71; CHECK-NO-TAIL: bl variadic 72entry: 73 %call = tail call i32 (i32, ...) @variadic(i32 %y, i64 %z, i32 %y) 74 ret void 75} 76 77; e.g. two 32-bit integers, one 64-bit integer and another 64-bit integer that 78; doesn't fit in r0-r3 but comes from the caller argument list and is in the 79; same position. 80define void @v_caller_ints4(i64 %a, i32 %b, i32 %c, i64 %d) { 81; CHECK-LABEL: v_caller_ints4: 82; CHECK-TAIL: b variadic 83; CHECK-TAIL-AAPCS: b variadic 84; CHECK-NO-TAIL: bl variadic 85entry: 86 %call = tail call i32 (i32, ...) @variadic(i32 %b, i32 %c, i64 %a, i64 %d) 87 ret void 88} 89 90; If the arguments do not fit in r0-r3 and the existing parameters cannot be 91; taken from the caller's parameter region, the optimization is not supported. 92 93; e.g. one 32-bit integer, two 64-bit integers 94define void @v_caller_ints_fail(i32 %y, i64 %z) { 95; CHECK-LABEL: v_caller_ints_fail: 96; CHECK: bl variadic 97entry: 98 %call = tail call i32 (i32, ...) @variadic(i32 %y, i64 %z, i64 %z) 99 ret void 100} 101 102; Check that NonNull attributes don't inhibit tailcalls. 103 104declare nonnull i8* @nonnull_callee(i8* %p, i32 %val) 105define i8* @nonnull_caller(i8* %p, i32 %val) { 106; CHECK-LABEL: nonnull_caller: 107; CHECK-TAIL: b nonnull_callee 108; CHECK-NO-TAIL: bl nonnull_callee 109entry: 110 %call = tail call i8* @nonnull_callee(i8* %p, i32 %val) 111 ret i8* %call 112} 113