1; RUN: llc -verify-machineinstrs -mcpu=g5 -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names < %s | FileCheck %s 2; Check that the peephole optimizer knows about sext and zext instructions. 3; CHECK: test1sext 4define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind { 5 %C = add i64 %A, %B 6 ; CHECK: add [[SUM:r[0-9]+]], r3, r4 7 %D = trunc i64 %C to i32 8 %E = shl i64 %C, 32 9 %F = ashr i64 %E, 32 10 ; CHECK: extsw [[EXT:r[0-9]+]], [[SUM]] 11 store volatile i64 %F, i64 *%P2 12 ; CHECK-DAG: std [[EXT]] 13 store volatile i32 %D, i32* %P 14 ; Reuse low bits of extended register, don't extend live range of SUM. 15 ; CHECK-DAG: stw [[SUM]] 16 %R = add i32 %D, %D 17 ret i32 %R 18} 19