1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s 3; 4; The test case check that RV64 could handle the stack adjustment offset exceed 5; 32-bit. 6 7define void @foo() nounwind { 8; CHECK-LABEL: foo: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: addi sp, sp, -2032 11; CHECK-NEXT: sd ra, 2024(sp) 12; CHECK-NEXT: lui a0, 95 13; CHECK-NEXT: addiw a0, a0, 1505 14; CHECK-NEXT: slli a0, a0, 13 15; CHECK-NEXT: addi a0, a0, -2000 16; CHECK-NEXT: sub sp, sp, a0 17; CHECK-NEXT: addi a0, sp, 16 18; CHECK-NEXT: call baz 19; CHECK-NEXT: lui a0, 95 20; CHECK-NEXT: addiw a0, a0, 1505 21; CHECK-NEXT: slli a0, a0, 13 22; CHECK-NEXT: addi a0, a0, -2000 23; CHECK-NEXT: add sp, sp, a0 24; CHECK-NEXT: ld ra, 2024(sp) 25; CHECK-NEXT: addi sp, sp, 2032 26; CHECK-NEXT: ret 27entry: 28 %w = alloca [100000000 x { fp128, fp128 }], align 16 29 %arraydecay = getelementptr inbounds [100000000 x { fp128, fp128 }], [100000000 x { fp128, fp128 }]* %w, i64 0, i64 0 30 call void @baz({ fp128, fp128 }* nonnull %arraydecay) 31 ret void 32} 33 34declare void @baz({ fp128, fp128 }*) 35