1; Test SETCC with an i32 result for every integer condition. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s 4 5; Test CC in { 0 }, with 3 don't care. 6define i64 @f1(i32 %a, i32 %b) { 7; CHECK-LABEL: f1: 8; CHECK: ipm [[REG:%r[0-5]]] 9; CHECK-NEXT: afi [[REG]], -268435456 10; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 33 11; CHECK: br %r14 12 %cond = icmp eq i32 %a, %b 13 %res = zext i1 %cond to i64 14 ret i64 %res 15} 16 17; Test CC in { 1 }, with 3 don't care. 18define i64 @f2(i32 %a, i32 %b) { 19; CHECK-LABEL: f2: 20; CHECK: ipm [[REG:%r[0-5]]] 21; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 36 22; CHECK: br %r14 23 %cond = icmp slt i32 %a, %b 24 %res = zext i1 %cond to i64 25 ret i64 %res 26} 27 28; Test CC in { 0, 1 }, with 3 don't care. 29define i64 @f3(i32 %a, i32 %b) { 30; CHECK-LABEL: f3: 31; CHECK: ipm [[REG:%r[0-5]]] 32; CHECK-NEXT: afi [[REG]], -536870912 33; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 33 34; CHECK: br %r14 35 %cond = icmp sle i32 %a, %b 36 %res = zext i1 %cond to i64 37 ret i64 %res 38} 39 40; Test CC in { 2 }, with 3 don't care. 41define i64 @f4(i32 %a, i32 %b) { 42; CHECK-LABEL: f4: 43; CHECK: ipm [[REG:%r[0-5]]] 44; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 35 45; CHECK: br %r14 46 %cond = icmp sgt i32 %a, %b 47 %res = zext i1 %cond to i64 48 ret i64 %res 49} 50 51; Test CC in { 0, 2 }, with 3 don't care. 52define i64 @f5(i32 %a, i32 %b) { 53; CHECK-LABEL: f5: 54; CHECK: ipm [[REG:%r[0-5]]] 55; CHECK-NEXT: xilf [[REG]], 4294967295 56; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 36 57; CHECK: br %r14 58 %cond = icmp sge i32 %a, %b 59 %res = zext i1 %cond to i64 60 ret i64 %res 61} 62 63; Test CC in { 1, 2 }, with 3 don't care. 64define i64 @f6(i32 %a, i32 %b) { 65; CHECK-LABEL: f6: 66; CHECK: ipm [[REG:%r[0-5]]] 67; CHECK-NEXT: afi [[REG]], 1879048192 68; CHECK-NEXT: risbg %r2, [[REG]], 63, 191, 33 69; CHECK: br %r14 70 %cond = icmp ne i32 %a, %b 71 %res = zext i1 %cond to i64 72 ret i64 %res 73} 74