1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s 3 4--- | 5 6 @arm_cmplx_conj_f32_mve.cmplx_conj_sign = internal constant [4 x float] [float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00], align 4 7 8 ; Function Attrs: nounwind 9 define hidden void @arm_cmplx_conj_f32_mve(float* %pSrc, float* %pDst, i32 %blockSize) local_unnamed_addr #0 { 10 entry: 11 ret void 12 } 13 14... 15--- 16name: arm_cmplx_conj_f32_mve 17alignment: 4 18tracksRegLiveness: true 19registers: [] 20liveins: 21 - { reg: '$r0', virtual-reg: '' } 22 - { reg: '$r1', virtual-reg: '' } 23 - { reg: '$r2', virtual-reg: '' } 24frameInfo: 25 stackSize: 8 26 offsetAdjustment: 0 27 maxAlignment: 4 28fixedStack: [] 29stack: 30 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 31 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 32 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 33 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 34 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 35 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 36machineFunctionInfo: {} 37body: | 38 ; CHECK-LABEL: name: arm_cmplx_conj_f32_mve 39 ; CHECK: bb.0: 40 ; CHECK: successors: %bb.1(0x80000000) 41 ; CHECK: liveins: $lr, $r0, $r1, $r2, $r4 42 ; CHECK: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp 43 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8 44 ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 45 ; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -8 46 ; CHECK: renamable $r3, dead $cpsr = tLSLri killed renamable $r2, 1, 14 /* CC::al */, $noreg 47 ; CHECK: $r4 = t2MOVi16 target-flags(arm-lo16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg 48 ; CHECK: $r4 = t2MOVTi16 killed $r4, target-flags(arm-hi16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg 49 ; CHECK: renamable $q0 = nnan ninf nsz MVE_VLDRWU32 killed renamable $r4, 0, 0, $noreg 50 ; CHECK: $lr = MVE_DLSTP_32 killed renamable $r3 51 ; CHECK: bb.1 (align 4): 52 ; CHECK: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 53 ; CHECK: liveins: $lr, $q0, $r0, $r1 54 ; CHECK: renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 0, $noreg 55 ; CHECK: renamable $q1 = nnan ninf nsz MVE_VMULf32 killed renamable $q1, renamable $q0, 0, $noreg, undef renamable $q1 56 ; CHECK: MVE_VSTRWU32 killed renamable $q1, renamable $r1, 0, 0, killed $noreg 57 ; CHECK: renamable $r1, dead $cpsr = nuw tADDi8 killed renamable $r1, 16, 14 /* CC::al */, $noreg 58 ; CHECK: renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg 59 ; CHECK: $lr = MVE_LETP killed renamable $lr, %bb.1 60 ; CHECK: bb.2: 61 ; CHECK: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc 62 bb.0: 63 successors: %bb.1(0x80000000) 64 liveins: $r0, $r1, $r2, $r4, $lr 65 66 frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp 67 frame-setup CFI_INSTRUCTION def_cfa_offset 8 68 frame-setup CFI_INSTRUCTION offset $lr, -4 69 frame-setup CFI_INSTRUCTION offset $r4, -8 70 renamable $r12 = t2MOVi 4, 14 /* CC::al */, $noreg, $noreg 71 renamable $r3, dead $cpsr = tLSLri renamable $r2, 1, 14 /* CC::al */, $noreg 72 tCMPi8 renamable $r3, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr 73 t2IT 11, 8, implicit-def $itstate 74 $r12 = t2LSLri renamable $r2, 1, 11 /* CC::lt */, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 75 renamable $r2 = t2RSBrs killed renamable $r12, killed renamable $r2, 10, 14 /* CC::al */, $noreg, $noreg 76 $r4 = t2MOVi16 target-flags(arm-lo16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg 77 renamable $r2, dead $cpsr = tADDi8 killed renamable $r2, 3, 14 /* CC::al */, $noreg 78 renamable $lr = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg 79 $r4 = t2MOVTi16 killed $r4, target-flags(arm-hi16) @arm_cmplx_conj_f32_mve.cmplx_conj_sign, 14 /* CC::al */, $noreg 80 renamable $q0 = nnan ninf nsz MVE_VLDRWU32 killed renamable $r4, 0, 0, $noreg 81 renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r2, 19, 14 /* CC::al */, $noreg, $noreg 82 $lr = t2DoLoopStart renamable $lr 83 84 bb.1 (align 4): 85 successors: %bb.1(0x7c000000), %bb.2(0x04000000) 86 liveins: $lr, $q0, $r0, $r1, $r3 87 88 renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg 89 MVE_VPST 2, implicit $vpr 90 renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr 91 renamable $q1 = nnan ninf nsz MVE_VMULf32 killed renamable $q1, renamable $q0, 1, renamable $vpr, undef renamable $q1 92 MVE_VSTRWU32 killed renamable $q1, renamable $r1, 0, 1, killed renamable $vpr 93 renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg 94 renamable $r1, dead $cpsr = nuw tADDi8 killed renamable $r1, 16, 14 /* CC::al */, $noreg 95 renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg 96 renamable $lr = t2LoopDec killed renamable $lr, 1 97 t2LoopEnd renamable $lr, %bb.1, implicit-def dead $cpsr 98 tB %bb.2, 14 /* CC::al */, $noreg 99 100 bb.2: 101 tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc 102 103... 104