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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X86
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X64
4
5declare <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly
6
7define <16 x i32> @test_conflict_d(<16 x i32> %a) {
8; CHECK-LABEL: test_conflict_d:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vpconflictd %zmm0, %zmm0
11; CHECK-NEXT:    ret{{[l|q]}}
12  %res = call <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32> %a, <16 x i32> undef, i16 -1)
13  ret <16 x i32> %res
14}
15
16define <16 x i32> @test_mask_conflict_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
17; X86-LABEL: test_mask_conflict_d:
18; X86:       # %bb.0:
19; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1
20; X86-NEXT:    vpconflictd %zmm0, %zmm1 {%k1}
21; X86-NEXT:    vmovdqa64 %zmm1, %zmm0
22; X86-NEXT:    retl
23;
24; X64-LABEL: test_mask_conflict_d:
25; X64:       # %bb.0:
26; X64-NEXT:    kmovw %edi, %k1
27; X64-NEXT:    vpconflictd %zmm0, %zmm1 {%k1}
28; X64-NEXT:    vmovdqa64 %zmm1, %zmm0
29; X64-NEXT:    retq
30  %res = call <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)
31  ret <16 x i32> %res
32}
33
34define <16 x i32> @test_maskz_conflict_d(<16 x i32> %a, i16 %mask) {
35; X86-LABEL: test_maskz_conflict_d:
36; X86:       # %bb.0:
37; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1
38; X86-NEXT:    vpconflictd %zmm0, %zmm0 {%k1} {z}
39; X86-NEXT:    retl
40;
41; X64-LABEL: test_maskz_conflict_d:
42; X64:       # %bb.0:
43; X64-NEXT:    kmovw %edi, %k1
44; X64-NEXT:    vpconflictd %zmm0, %zmm0 {%k1} {z}
45; X64-NEXT:    retq
46  %res = call <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32> %a, <16 x i32> zeroinitializer, i16 %mask)
47  ret <16 x i32> %res
48}
49
50declare <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64>, <8 x i64>, i8) nounwind readonly
51
52define <8 x i64> @test_conflict_q(<8 x i64> %a) {
53; CHECK-LABEL: test_conflict_q:
54; CHECK:       # %bb.0:
55; CHECK-NEXT:    vpconflictq %zmm0, %zmm0
56; CHECK-NEXT:    ret{{[l|q]}}
57  %res = call <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64> %a, <8 x i64> undef, i8 -1)
58  ret <8 x i64> %res
59}
60
61define <8 x i64> @test_mask_conflict_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
62; X86-LABEL: test_mask_conflict_q:
63; X86:       # %bb.0:
64; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
65; X86-NEXT:    kmovw %eax, %k1
66; X86-NEXT:    vpconflictq %zmm0, %zmm1 {%k1}
67; X86-NEXT:    vmovdqa64 %zmm1, %zmm0
68; X86-NEXT:    retl
69;
70; X64-LABEL: test_mask_conflict_q:
71; X64:       # %bb.0:
72; X64-NEXT:    kmovw %edi, %k1
73; X64-NEXT:    vpconflictq %zmm0, %zmm1 {%k1}
74; X64-NEXT:    vmovdqa64 %zmm1, %zmm0
75; X64-NEXT:    retq
76  %res = call <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
77  ret <8 x i64> %res
78}
79
80define <8 x i64> @test_maskz_conflict_q(<8 x i64> %a, i8 %mask) {
81; X86-LABEL: test_maskz_conflict_q:
82; X86:       # %bb.0:
83; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
84; X86-NEXT:    kmovw %eax, %k1
85; X86-NEXT:    vpconflictq %zmm0, %zmm0 {%k1} {z}
86; X86-NEXT:    retl
87;
88; X64-LABEL: test_maskz_conflict_q:
89; X64:       # %bb.0:
90; X64-NEXT:    kmovw %edi, %k1
91; X64-NEXT:    vpconflictq %zmm0, %zmm0 {%k1} {z}
92; X64-NEXT:    retq
93  %res = call <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64> %a, <8 x i64> zeroinitializer, i8 %mask)
94  ret <8 x i64> %res
95}
96
97define <16 x i32> @test_lzcnt_d(<16 x i32> %a) {
98; CHECK-LABEL: test_lzcnt_d:
99; CHECK:       # %bb.0:
100; CHECK-NEXT:    vplzcntd %zmm0, %zmm0
101; CHECK-NEXT:    ret{{[l|q]}}
102  %res = call <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32> %a, <16 x i32> zeroinitializer, i16 -1)
103  ret <16 x i32> %res
104}
105
106declare <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly
107
108define <8 x i64> @test_lzcnt_q(<8 x i64> %a) {
109; CHECK-LABEL: test_lzcnt_q:
110; CHECK:       # %bb.0:
111; CHECK-NEXT:    vplzcntq %zmm0, %zmm0
112; CHECK-NEXT:    ret{{[l|q]}}
113  %res = call <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64> %a, <8 x i64> zeroinitializer, i8 -1)
114  ret <8 x i64> %res
115}
116
117declare <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64>, <8 x i64>, i8) nounwind readonly
118
119
120define <16 x i32> @test_mask_lzcnt_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
121; X86-LABEL: test_mask_lzcnt_d:
122; X86:       # %bb.0:
123; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1
124; X86-NEXT:    vplzcntd %zmm0, %zmm1 {%k1}
125; X86-NEXT:    vmovdqa64 %zmm1, %zmm0
126; X86-NEXT:    retl
127;
128; X64-LABEL: test_mask_lzcnt_d:
129; X64:       # %bb.0:
130; X64-NEXT:    kmovw %edi, %k1
131; X64-NEXT:    vplzcntd %zmm0, %zmm1 {%k1}
132; X64-NEXT:    vmovdqa64 %zmm1, %zmm0
133; X64-NEXT:    retq
134  %res = call <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)
135  ret <16 x i32> %res
136}
137
138define <8 x i64> @test_mask_lzcnt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
139; X86-LABEL: test_mask_lzcnt_q:
140; X86:       # %bb.0:
141; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
142; X86-NEXT:    kmovw %eax, %k1
143; X86-NEXT:    vplzcntq %zmm0, %zmm1 {%k1}
144; X86-NEXT:    vmovdqa64 %zmm1, %zmm0
145; X86-NEXT:    retl
146;
147; X64-LABEL: test_mask_lzcnt_q:
148; X64:       # %bb.0:
149; X64-NEXT:    kmovw %edi, %k1
150; X64-NEXT:    vplzcntq %zmm0, %zmm1 {%k1}
151; X64-NEXT:    vmovdqa64 %zmm1, %zmm0
152; X64-NEXT:    retq
153  %res = call <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
154  ret <8 x i64> %res
155}
156
157define <16 x i32> @test_x86_vbroadcastmw_512(i16 %a0) {
158; X86-LABEL: test_x86_vbroadcastmw_512:
159; X86:       # %bb.0:
160; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
161; X86-NEXT:    vpbroadcastd %eax, %zmm0
162; X86-NEXT:    retl
163;
164; X64-LABEL: test_x86_vbroadcastmw_512:
165; X64:       # %bb.0:
166; X64-NEXT:    movzwl %di, %eax
167; X64-NEXT:    vpbroadcastd %eax, %zmm0
168; X64-NEXT:    retq
169  %res = call <16 x i32> @llvm.x86.avx512.broadcastmw.512(i16 %a0)
170  ret <16 x i32> %res
171}
172declare <16 x i32> @llvm.x86.avx512.broadcastmw.512(i16)
173
174define <8 x i64> @test_x86_broadcastmb_512(i8 %a0) {
175; X86-LABEL: test_x86_broadcastmb_512:
176; X86:       # %bb.0:
177; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
178; X86-NEXT:    vmovd %eax, %xmm0
179; X86-NEXT:    vpbroadcastq %xmm0, %zmm0
180; X86-NEXT:    retl
181;
182; X64-LABEL: test_x86_broadcastmb_512:
183; X64:       # %bb.0:
184; X64-NEXT:    # kill: def $edi killed $edi def $rdi
185; X64-NEXT:    movzbl %dil, %eax
186; X64-NEXT:    vpbroadcastq %rax, %zmm0
187; X64-NEXT:    retq
188  %res = call <8 x i64> @llvm.x86.avx512.broadcastmb.512(i8 %a0)
189  ret <8 x i64> %res
190}
191declare <8 x i64> @llvm.x86.avx512.broadcastmb.512(i8)
192
193