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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefixes=X86
3; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
4
5;
6; FADD
7;
8
9define x86_fp80 @fiadd_fp80_i16(x86_fp80 %a0, i16 %a1) {
10; X86-LABEL: fiadd_fp80_i16:
11; X86:       # %bb.0:
12; X86-NEXT:    pushl %eax
13; X86-NEXT:    .cfi_def_cfa_offset 8
14; X86-NEXT:    fldt {{[0-9]+}}(%esp)
15; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
16; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
17; X86-NEXT:    fiadds {{[0-9]+}}(%esp)
18; X86-NEXT:    popl %eax
19; X86-NEXT:    .cfi_def_cfa_offset 4
20; X86-NEXT:    retl
21;
22; X64-LABEL: fiadd_fp80_i16:
23; X64:       # %bb.0:
24; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
25; X64-NEXT:    movw %di, -{{[0-9]+}}(%rsp)
26; X64-NEXT:    fiadds -{{[0-9]+}}(%rsp)
27; X64-NEXT:    retq
28  %1 = sitofp i16 %a1 to x86_fp80
29  %2 = fadd x86_fp80 %a0, %1
30  ret x86_fp80 %2
31}
32
33define x86_fp80 @fiadd_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) {
34; X86-LABEL: fiadd_fp80_i16_ld:
35; X86:       # %bb.0:
36; X86-NEXT:    pushl %eax
37; X86-NEXT:    .cfi_def_cfa_offset 8
38; X86-NEXT:    fldt {{[0-9]+}}(%esp)
39; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
40; X86-NEXT:    movzwl (%eax), %eax
41; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
42; X86-NEXT:    fiadds {{[0-9]+}}(%esp)
43; X86-NEXT:    popl %eax
44; X86-NEXT:    .cfi_def_cfa_offset 4
45; X86-NEXT:    retl
46;
47; X64-LABEL: fiadd_fp80_i16_ld:
48; X64:       # %bb.0:
49; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
50; X64-NEXT:    movzwl (%rdi), %eax
51; X64-NEXT:    movw %ax, -{{[0-9]+}}(%rsp)
52; X64-NEXT:    fiadds -{{[0-9]+}}(%rsp)
53; X64-NEXT:    retq
54  %1 = load i16, i16 *%a1
55  %2 = sitofp i16 %1 to x86_fp80
56  %3 = fadd x86_fp80 %a0, %2
57  ret x86_fp80 %3
58}
59
60define x86_fp80 @fiadd_fp80_i32(x86_fp80 %a0, i32 %a1) {
61; X86-LABEL: fiadd_fp80_i32:
62; X86:       # %bb.0:
63; X86-NEXT:    pushl %eax
64; X86-NEXT:    .cfi_def_cfa_offset 8
65; X86-NEXT:    fldt {{[0-9]+}}(%esp)
66; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
67; X86-NEXT:    movl %eax, (%esp)
68; X86-NEXT:    fiaddl (%esp)
69; X86-NEXT:    popl %eax
70; X86-NEXT:    .cfi_def_cfa_offset 4
71; X86-NEXT:    retl
72;
73; X64-LABEL: fiadd_fp80_i32:
74; X64:       # %bb.0:
75; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
76; X64-NEXT:    movl %edi, -{{[0-9]+}}(%rsp)
77; X64-NEXT:    fiaddl -{{[0-9]+}}(%rsp)
78; X64-NEXT:    retq
79  %1 = sitofp i32 %a1 to x86_fp80
80  %2 = fadd x86_fp80 %a0, %1
81  ret x86_fp80 %2
82}
83
84define x86_fp80 @fiadd_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) {
85; X86-LABEL: fiadd_fp80_i32_ld:
86; X86:       # %bb.0:
87; X86-NEXT:    pushl %eax
88; X86-NEXT:    .cfi_def_cfa_offset 8
89; X86-NEXT:    fldt {{[0-9]+}}(%esp)
90; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
91; X86-NEXT:    movl (%eax), %eax
92; X86-NEXT:    movl %eax, (%esp)
93; X86-NEXT:    fiaddl (%esp)
94; X86-NEXT:    popl %eax
95; X86-NEXT:    .cfi_def_cfa_offset 4
96; X86-NEXT:    retl
97;
98; X64-LABEL: fiadd_fp80_i32_ld:
99; X64:       # %bb.0:
100; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
101; X64-NEXT:    movl (%rdi), %eax
102; X64-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
103; X64-NEXT:    fiaddl -{{[0-9]+}}(%rsp)
104; X64-NEXT:    retq
105  %1 = load i32, i32 *%a1
106  %2 = sitofp i32 %1 to x86_fp80
107  %3 = fadd x86_fp80 %a0, %2
108  ret x86_fp80 %3
109}
110
111;
112; FSUB
113;
114
115define x86_fp80 @fisub_fp80_i16(x86_fp80 %a0, i16 %a1) {
116; X86-LABEL: fisub_fp80_i16:
117; X86:       # %bb.0:
118; X86-NEXT:    pushl %eax
119; X86-NEXT:    .cfi_def_cfa_offset 8
120; X86-NEXT:    fldt {{[0-9]+}}(%esp)
121; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
122; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
123; X86-NEXT:    fisubs {{[0-9]+}}(%esp)
124; X86-NEXT:    popl %eax
125; X86-NEXT:    .cfi_def_cfa_offset 4
126; X86-NEXT:    retl
127;
128; X64-LABEL: fisub_fp80_i16:
129; X64:       # %bb.0:
130; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
131; X64-NEXT:    movw %di, -{{[0-9]+}}(%rsp)
132; X64-NEXT:    fisubs -{{[0-9]+}}(%rsp)
133; X64-NEXT:    retq
134  %1 = sitofp i16 %a1 to x86_fp80
135  %2 = fsub x86_fp80 %a0, %1
136  ret x86_fp80 %2
137}
138
139define x86_fp80 @fisub_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) {
140; X86-LABEL: fisub_fp80_i16_ld:
141; X86:       # %bb.0:
142; X86-NEXT:    pushl %eax
143; X86-NEXT:    .cfi_def_cfa_offset 8
144; X86-NEXT:    fldt {{[0-9]+}}(%esp)
145; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
146; X86-NEXT:    movzwl (%eax), %eax
147; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
148; X86-NEXT:    fisubs {{[0-9]+}}(%esp)
149; X86-NEXT:    popl %eax
150; X86-NEXT:    .cfi_def_cfa_offset 4
151; X86-NEXT:    retl
152;
153; X64-LABEL: fisub_fp80_i16_ld:
154; X64:       # %bb.0:
155; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
156; X64-NEXT:    movzwl (%rdi), %eax
157; X64-NEXT:    movw %ax, -{{[0-9]+}}(%rsp)
158; X64-NEXT:    fisubs -{{[0-9]+}}(%rsp)
159; X64-NEXT:    retq
160  %1 = load i16, i16 *%a1
161  %2 = sitofp i16 %1 to x86_fp80
162  %3 = fsub x86_fp80 %a0, %2
163  ret x86_fp80 %3
164}
165
166define x86_fp80 @fisub_fp80_i32(x86_fp80 %a0, i32 %a1) {
167; X86-LABEL: fisub_fp80_i32:
168; X86:       # %bb.0:
169; X86-NEXT:    pushl %eax
170; X86-NEXT:    .cfi_def_cfa_offset 8
171; X86-NEXT:    fldt {{[0-9]+}}(%esp)
172; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
173; X86-NEXT:    movl %eax, (%esp)
174; X86-NEXT:    fisubl (%esp)
175; X86-NEXT:    popl %eax
176; X86-NEXT:    .cfi_def_cfa_offset 4
177; X86-NEXT:    retl
178;
179; X64-LABEL: fisub_fp80_i32:
180; X64:       # %bb.0:
181; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
182; X64-NEXT:    movl %edi, -{{[0-9]+}}(%rsp)
183; X64-NEXT:    fisubl -{{[0-9]+}}(%rsp)
184; X64-NEXT:    retq
185  %1 = sitofp i32 %a1 to x86_fp80
186  %2 = fsub x86_fp80 %a0, %1
187  ret x86_fp80 %2
188}
189
190define x86_fp80 @fisub_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) {
191; X86-LABEL: fisub_fp80_i32_ld:
192; X86:       # %bb.0:
193; X86-NEXT:    pushl %eax
194; X86-NEXT:    .cfi_def_cfa_offset 8
195; X86-NEXT:    fldt {{[0-9]+}}(%esp)
196; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
197; X86-NEXT:    movl (%eax), %eax
198; X86-NEXT:    movl %eax, (%esp)
199; X86-NEXT:    fisubl (%esp)
200; X86-NEXT:    popl %eax
201; X86-NEXT:    .cfi_def_cfa_offset 4
202; X86-NEXT:    retl
203;
204; X64-LABEL: fisub_fp80_i32_ld:
205; X64:       # %bb.0:
206; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
207; X64-NEXT:    movl (%rdi), %eax
208; X64-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
209; X64-NEXT:    fisubl -{{[0-9]+}}(%rsp)
210; X64-NEXT:    retq
211  %1 = load i32, i32 *%a1
212  %2 = sitofp i32 %1 to x86_fp80
213  %3 = fsub x86_fp80 %a0, %2
214  ret x86_fp80 %3
215}
216
217;
218; FSUBR
219;
220
221define x86_fp80 @fisubr_fp80_i16(x86_fp80 %a0, i16 %a1) {
222; X86-LABEL: fisubr_fp80_i16:
223; X86:       # %bb.0:
224; X86-NEXT:    pushl %eax
225; X86-NEXT:    .cfi_def_cfa_offset 8
226; X86-NEXT:    fldt {{[0-9]+}}(%esp)
227; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
228; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
229; X86-NEXT:    fisubrs {{[0-9]+}}(%esp)
230; X86-NEXT:    popl %eax
231; X86-NEXT:    .cfi_def_cfa_offset 4
232; X86-NEXT:    retl
233;
234; X64-LABEL: fisubr_fp80_i16:
235; X64:       # %bb.0:
236; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
237; X64-NEXT:    movw %di, -{{[0-9]+}}(%rsp)
238; X64-NEXT:    fisubrs -{{[0-9]+}}(%rsp)
239; X64-NEXT:    retq
240  %1 = sitofp i16 %a1 to x86_fp80
241  %2 = fsub x86_fp80 %1, %a0
242  ret x86_fp80 %2
243}
244
245define x86_fp80 @fisubr_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) {
246; X86-LABEL: fisubr_fp80_i16_ld:
247; X86:       # %bb.0:
248; X86-NEXT:    pushl %eax
249; X86-NEXT:    .cfi_def_cfa_offset 8
250; X86-NEXT:    fldt {{[0-9]+}}(%esp)
251; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
252; X86-NEXT:    movzwl (%eax), %eax
253; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
254; X86-NEXT:    fisubrs {{[0-9]+}}(%esp)
255; X86-NEXT:    popl %eax
256; X86-NEXT:    .cfi_def_cfa_offset 4
257; X86-NEXT:    retl
258;
259; X64-LABEL: fisubr_fp80_i16_ld:
260; X64:       # %bb.0:
261; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
262; X64-NEXT:    movzwl (%rdi), %eax
263; X64-NEXT:    movw %ax, -{{[0-9]+}}(%rsp)
264; X64-NEXT:    fisubrs -{{[0-9]+}}(%rsp)
265; X64-NEXT:    retq
266  %1 = load i16, i16 *%a1
267  %2 = sitofp i16 %1 to x86_fp80
268  %3 = fsub x86_fp80 %2, %a0
269  ret x86_fp80 %3
270}
271
272define x86_fp80 @fisubr_fp80_i32(x86_fp80 %a0, i32 %a1) {
273; X86-LABEL: fisubr_fp80_i32:
274; X86:       # %bb.0:
275; X86-NEXT:    pushl %eax
276; X86-NEXT:    .cfi_def_cfa_offset 8
277; X86-NEXT:    fldt {{[0-9]+}}(%esp)
278; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
279; X86-NEXT:    movl %eax, (%esp)
280; X86-NEXT:    fisubrl (%esp)
281; X86-NEXT:    popl %eax
282; X86-NEXT:    .cfi_def_cfa_offset 4
283; X86-NEXT:    retl
284;
285; X64-LABEL: fisubr_fp80_i32:
286; X64:       # %bb.0:
287; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
288; X64-NEXT:    movl %edi, -{{[0-9]+}}(%rsp)
289; X64-NEXT:    fisubrl -{{[0-9]+}}(%rsp)
290; X64-NEXT:    retq
291  %1 = sitofp i32 %a1 to x86_fp80
292  %2 = fsub x86_fp80 %1, %a0
293  ret x86_fp80 %2
294}
295
296define x86_fp80 @fisubr_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) {
297; X86-LABEL: fisubr_fp80_i32_ld:
298; X86:       # %bb.0:
299; X86-NEXT:    pushl %eax
300; X86-NEXT:    .cfi_def_cfa_offset 8
301; X86-NEXT:    fldt {{[0-9]+}}(%esp)
302; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
303; X86-NEXT:    movl (%eax), %eax
304; X86-NEXT:    movl %eax, (%esp)
305; X86-NEXT:    fisubrl (%esp)
306; X86-NEXT:    popl %eax
307; X86-NEXT:    .cfi_def_cfa_offset 4
308; X86-NEXT:    retl
309;
310; X64-LABEL: fisubr_fp80_i32_ld:
311; X64:       # %bb.0:
312; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
313; X64-NEXT:    movl (%rdi), %eax
314; X64-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
315; X64-NEXT:    fisubrl -{{[0-9]+}}(%rsp)
316; X64-NEXT:    retq
317  %1 = load i32, i32 *%a1
318  %2 = sitofp i32 %1 to x86_fp80
319  %3 = fsub x86_fp80 %2, %a0
320  ret x86_fp80 %3
321}
322
323;
324; FMUL
325;
326
327define x86_fp80 @fimul_fp80_i16(x86_fp80 %a0, i16 %a1) {
328; X86-LABEL: fimul_fp80_i16:
329; X86:       # %bb.0:
330; X86-NEXT:    pushl %eax
331; X86-NEXT:    .cfi_def_cfa_offset 8
332; X86-NEXT:    fldt {{[0-9]+}}(%esp)
333; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
334; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
335; X86-NEXT:    fimuls {{[0-9]+}}(%esp)
336; X86-NEXT:    popl %eax
337; X86-NEXT:    .cfi_def_cfa_offset 4
338; X86-NEXT:    retl
339;
340; X64-LABEL: fimul_fp80_i16:
341; X64:       # %bb.0:
342; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
343; X64-NEXT:    movw %di, -{{[0-9]+}}(%rsp)
344; X64-NEXT:    fimuls -{{[0-9]+}}(%rsp)
345; X64-NEXT:    retq
346  %1 = sitofp i16 %a1 to x86_fp80
347  %2 = fmul x86_fp80 %a0, %1
348  ret x86_fp80 %2
349}
350
351define x86_fp80 @fimul_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) {
352; X86-LABEL: fimul_fp80_i16_ld:
353; X86:       # %bb.0:
354; X86-NEXT:    pushl %eax
355; X86-NEXT:    .cfi_def_cfa_offset 8
356; X86-NEXT:    fldt {{[0-9]+}}(%esp)
357; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
358; X86-NEXT:    movzwl (%eax), %eax
359; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
360; X86-NEXT:    fimuls {{[0-9]+}}(%esp)
361; X86-NEXT:    popl %eax
362; X86-NEXT:    .cfi_def_cfa_offset 4
363; X86-NEXT:    retl
364;
365; X64-LABEL: fimul_fp80_i16_ld:
366; X64:       # %bb.0:
367; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
368; X64-NEXT:    movzwl (%rdi), %eax
369; X64-NEXT:    movw %ax, -{{[0-9]+}}(%rsp)
370; X64-NEXT:    fimuls -{{[0-9]+}}(%rsp)
371; X64-NEXT:    retq
372  %1 = load i16, i16 *%a1
373  %2 = sitofp i16 %1 to x86_fp80
374  %3 = fmul x86_fp80 %a0, %2
375  ret x86_fp80 %3
376}
377
378define x86_fp80 @fimul_fp80_i32(x86_fp80 %a0, i32 %a1) {
379; X86-LABEL: fimul_fp80_i32:
380; X86:       # %bb.0:
381; X86-NEXT:    pushl %eax
382; X86-NEXT:    .cfi_def_cfa_offset 8
383; X86-NEXT:    fldt {{[0-9]+}}(%esp)
384; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
385; X86-NEXT:    movl %eax, (%esp)
386; X86-NEXT:    fimull (%esp)
387; X86-NEXT:    popl %eax
388; X86-NEXT:    .cfi_def_cfa_offset 4
389; X86-NEXT:    retl
390;
391; X64-LABEL: fimul_fp80_i32:
392; X64:       # %bb.0:
393; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
394; X64-NEXT:    movl %edi, -{{[0-9]+}}(%rsp)
395; X64-NEXT:    fimull -{{[0-9]+}}(%rsp)
396; X64-NEXT:    retq
397  %1 = sitofp i32 %a1 to x86_fp80
398  %2 = fmul x86_fp80 %a0, %1
399  ret x86_fp80 %2
400}
401
402define x86_fp80 @fimul_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) {
403; X86-LABEL: fimul_fp80_i32_ld:
404; X86:       # %bb.0:
405; X86-NEXT:    pushl %eax
406; X86-NEXT:    .cfi_def_cfa_offset 8
407; X86-NEXT:    fldt {{[0-9]+}}(%esp)
408; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
409; X86-NEXT:    movl (%eax), %eax
410; X86-NEXT:    movl %eax, (%esp)
411; X86-NEXT:    fimull (%esp)
412; X86-NEXT:    popl %eax
413; X86-NEXT:    .cfi_def_cfa_offset 4
414; X86-NEXT:    retl
415;
416; X64-LABEL: fimul_fp80_i32_ld:
417; X64:       # %bb.0:
418; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
419; X64-NEXT:    movl (%rdi), %eax
420; X64-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
421; X64-NEXT:    fimull -{{[0-9]+}}(%rsp)
422; X64-NEXT:    retq
423  %1 = load i32, i32 *%a1
424  %2 = sitofp i32 %1 to x86_fp80
425  %3 = fmul x86_fp80 %a0, %2
426  ret x86_fp80 %3
427}
428
429;
430; FDIV
431;
432
433define x86_fp80 @fidiv_fp80_i16(x86_fp80 %a0, i16 %a1) {
434; X86-LABEL: fidiv_fp80_i16:
435; X86:       # %bb.0:
436; X86-NEXT:    pushl %eax
437; X86-NEXT:    .cfi_def_cfa_offset 8
438; X86-NEXT:    fldt {{[0-9]+}}(%esp)
439; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
440; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
441; X86-NEXT:    fidivs {{[0-9]+}}(%esp)
442; X86-NEXT:    popl %eax
443; X86-NEXT:    .cfi_def_cfa_offset 4
444; X86-NEXT:    retl
445;
446; X64-LABEL: fidiv_fp80_i16:
447; X64:       # %bb.0:
448; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
449; X64-NEXT:    movw %di, -{{[0-9]+}}(%rsp)
450; X64-NEXT:    fidivs -{{[0-9]+}}(%rsp)
451; X64-NEXT:    retq
452  %1 = sitofp i16 %a1 to x86_fp80
453  %2 = fdiv x86_fp80 %a0, %1
454  ret x86_fp80 %2
455}
456
457define x86_fp80 @fidiv_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) {
458; X86-LABEL: fidiv_fp80_i16_ld:
459; X86:       # %bb.0:
460; X86-NEXT:    pushl %eax
461; X86-NEXT:    .cfi_def_cfa_offset 8
462; X86-NEXT:    fldt {{[0-9]+}}(%esp)
463; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
464; X86-NEXT:    movzwl (%eax), %eax
465; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
466; X86-NEXT:    fidivs {{[0-9]+}}(%esp)
467; X86-NEXT:    popl %eax
468; X86-NEXT:    .cfi_def_cfa_offset 4
469; X86-NEXT:    retl
470;
471; X64-LABEL: fidiv_fp80_i16_ld:
472; X64:       # %bb.0:
473; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
474; X64-NEXT:    movzwl (%rdi), %eax
475; X64-NEXT:    movw %ax, -{{[0-9]+}}(%rsp)
476; X64-NEXT:    fidivs -{{[0-9]+}}(%rsp)
477; X64-NEXT:    retq
478  %1 = load i16, i16 *%a1
479  %2 = sitofp i16 %1 to x86_fp80
480  %3 = fdiv x86_fp80 %a0, %2
481  ret x86_fp80 %3
482}
483
484define x86_fp80 @fidiv_fp80_i32(x86_fp80 %a0, i32 %a1) {
485; X86-LABEL: fidiv_fp80_i32:
486; X86:       # %bb.0:
487; X86-NEXT:    pushl %eax
488; X86-NEXT:    .cfi_def_cfa_offset 8
489; X86-NEXT:    fldt {{[0-9]+}}(%esp)
490; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
491; X86-NEXT:    movl %eax, (%esp)
492; X86-NEXT:    fidivl (%esp)
493; X86-NEXT:    popl %eax
494; X86-NEXT:    .cfi_def_cfa_offset 4
495; X86-NEXT:    retl
496;
497; X64-LABEL: fidiv_fp80_i32:
498; X64:       # %bb.0:
499; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
500; X64-NEXT:    movl %edi, -{{[0-9]+}}(%rsp)
501; X64-NEXT:    fidivl -{{[0-9]+}}(%rsp)
502; X64-NEXT:    retq
503  %1 = sitofp i32 %a1 to x86_fp80
504  %2 = fdiv x86_fp80 %a0, %1
505  ret x86_fp80 %2
506}
507
508define x86_fp80 @fidiv_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) {
509; X86-LABEL: fidiv_fp80_i32_ld:
510; X86:       # %bb.0:
511; X86-NEXT:    pushl %eax
512; X86-NEXT:    .cfi_def_cfa_offset 8
513; X86-NEXT:    fldt {{[0-9]+}}(%esp)
514; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
515; X86-NEXT:    movl (%eax), %eax
516; X86-NEXT:    movl %eax, (%esp)
517; X86-NEXT:    fidivl (%esp)
518; X86-NEXT:    popl %eax
519; X86-NEXT:    .cfi_def_cfa_offset 4
520; X86-NEXT:    retl
521;
522; X64-LABEL: fidiv_fp80_i32_ld:
523; X64:       # %bb.0:
524; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
525; X64-NEXT:    movl (%rdi), %eax
526; X64-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
527; X64-NEXT:    fidivl -{{[0-9]+}}(%rsp)
528; X64-NEXT:    retq
529  %1 = load i32, i32 *%a1
530  %2 = sitofp i32 %1 to x86_fp80
531  %3 = fdiv x86_fp80 %a0, %2
532  ret x86_fp80 %3
533}
534
535;
536; FDIVR
537;
538
539define x86_fp80 @fidivr_fp80_i16(x86_fp80 %a0, i16 %a1) {
540; X86-LABEL: fidivr_fp80_i16:
541; X86:       # %bb.0:
542; X86-NEXT:    pushl %eax
543; X86-NEXT:    .cfi_def_cfa_offset 8
544; X86-NEXT:    fldt {{[0-9]+}}(%esp)
545; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
546; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
547; X86-NEXT:    fidivrs {{[0-9]+}}(%esp)
548; X86-NEXT:    popl %eax
549; X86-NEXT:    .cfi_def_cfa_offset 4
550; X86-NEXT:    retl
551;
552; X64-LABEL: fidivr_fp80_i16:
553; X64:       # %bb.0:
554; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
555; X64-NEXT:    movw %di, -{{[0-9]+}}(%rsp)
556; X64-NEXT:    fidivrs -{{[0-9]+}}(%rsp)
557; X64-NEXT:    retq
558  %1 = sitofp i16 %a1 to x86_fp80
559  %2 = fdiv x86_fp80 %1, %a0
560  ret x86_fp80 %2
561}
562
563define x86_fp80 @fidivr_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) {
564; X86-LABEL: fidivr_fp80_i16_ld:
565; X86:       # %bb.0:
566; X86-NEXT:    pushl %eax
567; X86-NEXT:    .cfi_def_cfa_offset 8
568; X86-NEXT:    fldt {{[0-9]+}}(%esp)
569; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
570; X86-NEXT:    movzwl (%eax), %eax
571; X86-NEXT:    movw %ax, {{[0-9]+}}(%esp)
572; X86-NEXT:    fidivrs {{[0-9]+}}(%esp)
573; X86-NEXT:    popl %eax
574; X86-NEXT:    .cfi_def_cfa_offset 4
575; X86-NEXT:    retl
576;
577; X64-LABEL: fidivr_fp80_i16_ld:
578; X64:       # %bb.0:
579; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
580; X64-NEXT:    movzwl (%rdi), %eax
581; X64-NEXT:    movw %ax, -{{[0-9]+}}(%rsp)
582; X64-NEXT:    fidivrs -{{[0-9]+}}(%rsp)
583; X64-NEXT:    retq
584  %1 = load i16, i16 *%a1
585  %2 = sitofp i16 %1 to x86_fp80
586  %3 = fdiv x86_fp80 %2, %a0
587  ret x86_fp80 %3
588}
589
590define x86_fp80 @fidivr_fp80_i32(x86_fp80 %a0, i32 %a1) {
591; X86-LABEL: fidivr_fp80_i32:
592; X86:       # %bb.0:
593; X86-NEXT:    pushl %eax
594; X86-NEXT:    .cfi_def_cfa_offset 8
595; X86-NEXT:    fldt {{[0-9]+}}(%esp)
596; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
597; X86-NEXT:    movl %eax, (%esp)
598; X86-NEXT:    fidivrl (%esp)
599; X86-NEXT:    popl %eax
600; X86-NEXT:    .cfi_def_cfa_offset 4
601; X86-NEXT:    retl
602;
603; X64-LABEL: fidivr_fp80_i32:
604; X64:       # %bb.0:
605; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
606; X64-NEXT:    movl %edi, -{{[0-9]+}}(%rsp)
607; X64-NEXT:    fidivrl -{{[0-9]+}}(%rsp)
608; X64-NEXT:    retq
609  %1 = sitofp i32 %a1 to x86_fp80
610  %2 = fdiv x86_fp80 %1, %a0
611  ret x86_fp80 %2
612}
613
614define x86_fp80 @fidivr_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) {
615; X86-LABEL: fidivr_fp80_i32_ld:
616; X86:       # %bb.0:
617; X86-NEXT:    pushl %eax
618; X86-NEXT:    .cfi_def_cfa_offset 8
619; X86-NEXT:    fldt {{[0-9]+}}(%esp)
620; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
621; X86-NEXT:    movl (%eax), %eax
622; X86-NEXT:    movl %eax, (%esp)
623; X86-NEXT:    fidivrl (%esp)
624; X86-NEXT:    popl %eax
625; X86-NEXT:    .cfi_def_cfa_offset 4
626; X86-NEXT:    retl
627;
628; X64-LABEL: fidivr_fp80_i32_ld:
629; X64:       # %bb.0:
630; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
631; X64-NEXT:    movl (%rdi), %eax
632; X64-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)
633; X64-NEXT:    fidivrl -{{[0-9]+}}(%rsp)
634; X64-NEXT:    retq
635  %1 = load i32, i32 *%a1
636  %2 = sitofp i32 %1 to x86_fp80
637  %3 = fdiv x86_fp80 %2, %a0
638  ret x86_fp80 %3
639}
640