1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE 3; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1 4; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512 5 6define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) { 7; SSE-LABEL: test_x86_sse2_cvtsd2si64: 8; SSE: ## %bb.0: 9; SSE-NEXT: cvtsd2si %xmm0, %rax ## encoding: [0xf2,0x48,0x0f,0x2d,0xc0] 10; SSE-NEXT: retq ## encoding: [0xc3] 11; 12; AVX1-LABEL: test_x86_sse2_cvtsd2si64: 13; AVX1: ## %bb.0: 14; AVX1-NEXT: vcvtsd2si %xmm0, %rax ## encoding: [0xc4,0xe1,0xfb,0x2d,0xc0] 15; AVX1-NEXT: retq ## encoding: [0xc3] 16; 17; AVX512-LABEL: test_x86_sse2_cvtsd2si64: 18; AVX512: ## %bb.0: 19; AVX512-NEXT: vcvtsd2si %xmm0, %rax ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfb,0x2d,0xc0] 20; AVX512-NEXT: retq ## encoding: [0xc3] 21 %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1] 22 ret i64 %res 23} 24declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone 25 26 27define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) { 28; SSE-LABEL: test_x86_sse2_cvttsd2si64: 29; SSE: ## %bb.0: 30; SSE-NEXT: cvttsd2si %xmm0, %rax ## encoding: [0xf2,0x48,0x0f,0x2c,0xc0] 31; SSE-NEXT: retq ## encoding: [0xc3] 32; 33; AVX1-LABEL: test_x86_sse2_cvttsd2si64: 34; AVX1: ## %bb.0: 35; AVX1-NEXT: vcvttsd2si %xmm0, %rax ## encoding: [0xc4,0xe1,0xfb,0x2c,0xc0] 36; AVX1-NEXT: retq ## encoding: [0xc3] 37; 38; AVX512-LABEL: test_x86_sse2_cvttsd2si64: 39; AVX512: ## %bb.0: 40; AVX512-NEXT: vcvttsd2si %xmm0, %rax ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfb,0x2c,0xc0] 41; AVX512-NEXT: retq ## encoding: [0xc3] 42 %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1] 43 ret i64 %res 44} 45declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone 46