1// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm -convert-std-to-llvm | \ 2// RUN: mlir-cpu-runner -e entry -entry-point-result=void \ 3// RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ 4// RUN: FileCheck %s 5 6func @maskedload16(%base: memref<?xf32>, %mask: vector<16xi1>, 7 %pass_thru: vector<16xf32>) -> vector<16xf32> { 8 %ld = vector.maskedload %base, %mask, %pass_thru 9 : memref<?xf32>, vector<16xi1>, vector<16xf32> into vector<16xf32> 10 return %ld : vector<16xf32> 11} 12 13func @entry() { 14 // Set up memory. 15 %c0 = constant 0: index 16 %c1 = constant 1: index 17 %c16 = constant 16: index 18 %A = alloc(%c16) : memref<?xf32> 19 scf.for %i = %c0 to %c16 step %c1 { 20 %i32 = index_cast %i : index to i32 21 %fi = sitofp %i32 : i32 to f32 22 store %fi, %A[%i] : memref<?xf32> 23 } 24 25 // Set up pass thru vector. 26 %u = constant -7.0: f32 27 %pass = vector.broadcast %u : f32 to vector<16xf32> 28 29 // Set up masks. 30 %f = constant 0: i1 31 %t = constant 1: i1 32 %none = vector.constant_mask [0] : vector<16xi1> 33 %all = vector.constant_mask [16] : vector<16xi1> 34 %some = vector.constant_mask [8] : vector<16xi1> 35 %0 = vector.insert %f, %some[0] : i1 into vector<16xi1> 36 %1 = vector.insert %t, %0[13] : i1 into vector<16xi1> 37 %2 = vector.insert %t, %1[14] : i1 into vector<16xi1> 38 %other = vector.insert %t, %2[14] : i1 into vector<16xi1> 39 40 // 41 // Masked load tests. 42 // 43 44 %l1 = call @maskedload16(%A, %none, %pass) 45 : (memref<?xf32>, vector<16xi1>, vector<16xf32>) -> (vector<16xf32>) 46 vector.print %l1 : vector<16xf32> 47 // CHECK: ( -7, -7, -7, -7, -7, -7, -7, -7, -7, -7, -7, -7, -7, -7, -7, -7 ) 48 49 %l2 = call @maskedload16(%A, %all, %pass) 50 : (memref<?xf32>, vector<16xi1>, vector<16xf32>) -> (vector<16xf32>) 51 vector.print %l2 : vector<16xf32> 52 // CHECK: ( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 ) 53 54 %l3 = call @maskedload16(%A, %some, %pass) 55 : (memref<?xf32>, vector<16xi1>, vector<16xf32>) -> (vector<16xf32>) 56 vector.print %l3 : vector<16xf32> 57 // CHECK: ( 0, 1, 2, 3, 4, 5, 6, 7, -7, -7, -7, -7, -7, -7, -7, -7 ) 58 59 %l4 = call @maskedload16(%A, %other, %pass) 60 : (memref<?xf32>, vector<16xi1>, vector<16xf32>) -> (vector<16xf32>) 61 vector.print %l4 : vector<16xf32> 62 // CHECK: ( -7, 1, 2, 3, 4, 5, 6, 7, -7, -7, -7, -7, -7, 13, 14, -7 ) 63 64 return 65} 66 67