1; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s 2 3define i32 @t2ADDrc_255(i32 %lhs) { 4; CHECK-LABEL: t2ADDrc_255: 5; CHECK-NOT: bx lr 6; CHECK: add{{.*}} #255 7; CHECK: bx lr 8 9 %Rd = add i32 %lhs, 255 10 ret i32 %Rd 11} 12 13define i32 @t2ADDrc_256(i32 %lhs) { 14; CHECK-LABEL: t2ADDrc_256: 15; CHECK-NOT: bx lr 16; CHECK: add{{.*}} #256 17; CHECK: bx lr 18 19 %Rd = add i32 %lhs, 256 20 ret i32 %Rd 21} 22 23define i32 @t2ADDrc_257(i32 %lhs) { 24; CHECK-LABEL: t2ADDrc_257: 25; CHECK-NOT: bx lr 26; CHECK: add{{.*}} #257 27; CHECK: bx lr 28 29 %Rd = add i32 %lhs, 257 30 ret i32 %Rd 31} 32 33define i32 @t2ADDrc_4094(i32 %lhs) { 34; CHECK-LABEL: t2ADDrc_4094: 35; CHECK-NOT: bx lr 36; CHECK: add{{.*}} #4094 37; CHECK: bx lr 38 39 %Rd = add i32 %lhs, 4094 40 ret i32 %Rd 41} 42 43define i32 @t2ADDrc_4095(i32 %lhs) { 44; CHECK-LABEL: t2ADDrc_4095: 45; CHECK-NOT: bx lr 46; CHECK: add{{.*}} #4095 47; CHECK: bx lr 48 49 %Rd = add i32 %lhs, 4095 50 ret i32 %Rd 51} 52 53define i32 @t2ADDrc_4096(i32 %lhs) { 54; CHECK-LABEL: t2ADDrc_4096: 55; CHECK-NOT: bx lr 56; CHECK: add{{.*}} #4096 57; CHECK: bx lr 58 59 %Rd = add i32 %lhs, 4096 60 ret i32 %Rd 61} 62 63define i32 @t2ADDrr(i32 %lhs, i32 %rhs) { 64; CHECK-LABEL: t2ADDrr: 65; CHECK-NOT: bx lr 66; CHECK: add 67; CHECK: bx lr 68 69 %Rd = add i32 %lhs, %rhs 70 ret i32 %Rd 71} 72 73define i32 @t2ADDrs(i32 %lhs, i32 %rhs) { 74; CHECK-LABEL: t2ADDrs: 75; CHECK-NOT: bx lr 76; CHECK: add{{.*}} lsl #8 77; CHECK: bx lr 78 79 %tmp = shl i32 %rhs, 8 80 %Rd = add i32 %lhs, %tmp 81 ret i32 %Rd 82} 83 84