1; RUN: llc < %s -march=x86 2 3define i32 @unique(i8* %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) { 4entry: 5 br i1 false, label %cond_true15, label %cond_next107 6 7cond_true15: ; preds = %entry 8 br i1 false, label %bb98.preheader, label %bb 9 10bb: ; preds = %cond_true15 11 ret i32 0 12 13bb98.preheader: ; preds = %cond_true15 14 br i1 false, label %bb103, label %bb69.outer 15 16bb76.split: ; preds = %bb69.outer.split.split, %bb69.us208 17 br i1 false, label %bb103, label %bb69.outer 18 19bb69.outer: ; preds = %bb76.split, %bb98.preheader 20 %from.0.reg2mem.0.ph.rec = phi i32 [ %tmp75.rec, %bb76.split ], [ 0, %bb98.preheader ] ; <i32> [#uses=1] 21 %tmp75.rec = add i32 %from.0.reg2mem.0.ph.rec, 1 ; <i32> [#uses=2] 22 %tmp75 = getelementptr i8, i8* null, i32 %tmp75.rec ; <i8*> [#uses=6] 23 br i1 false, label %bb69.us208, label %bb69.outer.split.split 24 25bb69.us208: ; preds = %bb69.outer 26 switch i32 0, label %bb76.split [ 27 i32 47, label %bb89 28 i32 58, label %bb89 29 i32 92, label %bb89 30 ] 31 32bb69.outer.split.split: ; preds = %bb69.outer 33 switch i8 0, label %bb76.split [ 34 i8 47, label %bb89 35 i8 58, label %bb89 36 i8 92, label %bb89 37 ] 38 39bb89: ; preds = %bb69.outer.split.split, %bb69.outer.split.split, %bb69.outer.split.split, %bb69.us208, %bb69.us208, %bb69.us208 40 %tmp75.lcssa189 = phi i8* [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.us208 ], [ %tmp75, %bb69.outer.split.split ], [ %tmp75, %bb69.outer.split.split ], [ %tmp75, %bb69.outer.split.split ] ; <i8*> [#uses=0] 41 ret i32 0 42 43bb103: ; preds = %bb76.split, %bb98.preheader 44 ret i32 0 45 46cond_next107: ; preds = %entry 47 ret i32 0 48} 49