Lines Matching refs:MBB
41 static void emitSPUpdate(MachineBasicBlock &MBB, in emitSPUpdate() argument
46 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII, in emitSPUpdate()
52 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, in eliminateCallFramePseudoInstr() argument
75 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount); in eliminateCallFramePseudoInstr()
78 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount); in eliminateCallFramePseudoInstr()
82 return MBB.erase(I); in eliminateCallFramePseudoInstr()
86 MachineBasicBlock &MBB) const { in emitPrologue()
87 MachineBasicBlock::iterator MBBI = MBB.begin(); in emitPrologue()
121 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -ArgRegsSaveSize, in emitPrologue()
126 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
133 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -(NumBytes - ArgRegsSaveSize), in emitPrologue()
138 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
172 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) { in emitPrologue()
201 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
229 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
240 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue()
247 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
254 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
266 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes, in emitPrologue()
272 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
296 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr) in emitPrologue()
322 MachineBasicBlock &MBB) const { in emitEpilogue()
323 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator(); in emitEpilogue()
324 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); in emitEpilogue()
341 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes - ArgRegsSaveSize); in emitEpilogue()
344 if (MBBI != MBB.begin()) { in emitEpilogue()
347 while (MBBI != MBB.begin() && isCSRestore(*MBBI, CSRegs)); in emitEpilogue()
366 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue()
368 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), in emitEpilogue()
372 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), in emitEpilogue()
376 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tBX_RET && in emitEpilogue()
377 &MBB.front() != &*MBBI && std::prev(MBBI)->getOpcode() == ARM::tPOP) { in emitEpilogue()
380 emitSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes); in emitEpilogue()
382 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes); in emitEpilogue()
387 bool Done = emitPopSpecialFixUp(MBB, /* DoIt */ true); in emitEpilogue()
393 bool Thumb1FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const { in canUseAsEpilogue()
394 if (!needPopSpecialFixUp(*MBB.getParent())) in canUseAsEpilogue()
397 MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB); in canUseAsEpilogue()
415 bool Thumb1FrameLowering::emitPopSpecialFixUp(MachineBasicBlock &MBB, in emitPopSpecialFixUp() argument
417 MachineFunction &MF = *MBB.getParent(); in emitPopSpecialFixUp()
431 auto MBBI = MBB.getFirstTerminator(); in emitPopSpecialFixUp()
434 if (MBBI != MBB.end() && MBBI->getOpcode() != ARM::tB) in emitPopSpecialFixUp()
441 assert(MBB.succ_size() == 1); in emitPopSpecialFixUp()
442 if ((*MBB.succ_begin())->begin()->getOpcode() == ARM::tBX_RET) in emitPopSpecialFixUp()
454 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII.get(ARM::tPOP_RET))); in emitPopSpecialFixUp()
461 MBB.erase(MBBI); in emitPopSpecialFixUp()
468 UsedRegs.addLiveOuts(MBB); in emitPopSpecialFixUp()
479 if (MBBI != MBB.end()) { in emitPopSpecialFixUp()
481 auto InstUpToMBBI = MBB.end(); in emitPopSpecialFixUp()
526 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr)) in emitPopSpecialFixUp()
531 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPOP_RET) { in emitPopSpecialFixUp()
536 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII.get(ARM::tPOP))); in emitPopSpecialFixUp()
547 MBB.erase(MIB.getInstr()); in emitPopSpecialFixUp()
549 MBB.erase(MBBI); in emitPopSpecialFixUp()
550 MBBI = AddDefaultPred(BuildMI(MBB, MBB.end(), dl, TII.get(ARM::tBX_RET))); in emitPopSpecialFixUp()
554 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP))) in emitPopSpecialFixUp()
557 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, ArgRegsSaveSize); in emitPopSpecialFixUp()
559 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr)) in emitPopSpecialFixUp()
564 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr)) in emitPopSpecialFixUp()
572 spillCalleeSavedRegisters(MachineBasicBlock &MBB, in spillCalleeSavedRegisters() argument
582 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH)); in spillCalleeSavedRegisters()
592 MachineFunction &MF = *MBB.getParent(); in spillCalleeSavedRegisters()
599 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
608 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, in restoreCalleeSavedRegisters() argument
615 MachineFunction &MF = *MBB.getParent(); in restoreCalleeSavedRegisters()
620 DebugLoc DL = MI != MBB.end() ? MI->getDebugLoc() : DebugLoc(); in restoreCalleeSavedRegisters()
628 if (MBB.succ_empty()) { in restoreCalleeSavedRegisters()
637 if (MI != MBB.end()) in restoreCalleeSavedRegisters()
639 MI = MBB.erase(MI); in restoreCalleeSavedRegisters()
652 MBB.insert(MI, &*MIB); in restoreCalleeSavedRegisters()