Lines Matching +full:- +full:- +full:all
3 ; RUN: llc -no-integrated-as -march=mipsel -relocation-model=pic < %s | \
4 ; RUN: FileCheck -check-prefixes=ALL,LE32,GAS %s
5 ; RUN: llc -no-integrated-as -march=mips -relocation-model=pic < %s | \
6 ; RUN: FileCheck -check-prefixes=ALL,BE32,GAS %s
9 ; RUN: llc -march=mipsel -relocation-model=pic < %s | \
10 ; RUN: FileCheck -check-prefixes=ALL,LE32,IAS %s
11 ; RUN: llc -march=mips -relocation-model=pic < %s | \
12 ; RUN: FileCheck -check-prefixes=ALL,BE32,IAS %s
18 ; X with -3
21 ; ALL-LABEL: constraint_X:
22 ; ALL: #APP
23 ; GAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0xfffffffffffffffd
24 ; IAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
25 ; ALL: #NO_APP
26 tail call i32 asm sideeffect "addiu $0, $1, ${2:X}", "=r,r,I"(i32 7, i32 -3) ;
30 ; x with -3
33 ; ALL-LABEL: constraint_x:
34 ; ALL: #APP
35 ; GAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0xfffd
36 ; This is _also_ -3 because uimm16 values are silently coerced to simm16 when
38 ; IAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
39 ; ALL: #NO_APP
40 tail call i32 asm sideeffect "addiu $0, $1, ${2:x}", "=r,r,I"(i32 7, i32 -3) ;
44 ; d with -3
47 ; ALL-LABEL: constraint_d:
48 ; ALL: #APP
49 ; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
50 ; ALL: #NO_APP
51 tail call i32 asm sideeffect "addiu $0, $1, ${2:d}", "=r,r,I"(i32 7, i32 -3) ;
55 ; m with -3
58 ; ALL-LABEL: constraint_m:
59 ; ALL: #APP
60 ; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -4
61 ; ALL: #NO_APP
62 tail call i32 asm sideeffect "addiu $0, $1, ${2:m}", "=r,r,I"(i32 7, i32 -3) ;
66 ; z with -3
69 ; ALL-LABEL: constraint_z_0:
70 ; ALL: #APP
71 ; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
72 ; ALL: #NO_APP
73 tail call i32 asm sideeffect "addiu $0, $1, ${2:z}", "=r,r,I"(i32 7, i32 -3) ;
80 ; ALL-LABEL: constraint_z_1:
81 ; ALL: #APP
82 ; GAS: addu ${{[0-9]+}}, ${{[0-9]+}}, $0
83 ; IAS: move ${{[0-9]+}}, ${{[0-9]+}}
84 ; ALL: #NO_APP
89 ; z with non-zero and the "r"(register) and "J"(integer zero) constraints
92 ; ALL-LABEL: constraint_z_2:
93 ; ALL: #APP
94 ; ALL: mtc0 ${{[1-9][0-9]?}}, ${{[0-9]+}}
95 ; ALL: #NO_APP
103 ; ALL-LABEL: constraint_z_3:
104 ; ALL: #APP
105 ; GAS: mtc0 $0, ${{[0-9]+}}
106 ; IAS: mtc0 $zero, ${{[0-9]+}}, 0
107 ; ALL: #NO_APP
112 ; z with non-zero and just the "r"(register) constraint
115 ; ALL-LABEL: constraint_z_4:
116 ; ALL: #APP
117 ; ALL: mtc0 ${{[1-9][0-9]?}}, ${{[0-9]+}}
118 ; ALL: #NO_APP
126 ; ALL-LABEL: constraint_z_5:
130 ; ALL: #APP
131 ; ALL: mtc0 ${{[1-9][0-9]?}}, ${{[0-9]+}}
132 ; ALL: #NO_APP
140 ; ALL-LABEL: constraint_longlong:
141 ; ALL: #APP
142 ; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, 3
143 ; ALL: #NO_APP
152 ; ALL-LABEL: constraint_D:
153 ; ALL: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
154 ; ALL: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
155 ; ALL: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
156 ; ALL: #APP
157 ; LE32: or ${{[0-9]+}}, $[[SECOND]], ${{[0-9]+}}
158 ; BE32: or ${{[0-9]+}}, $[[SECOND]], ${{[0-9]+}}
159 ; ALL: #NO_APP
170 ; ALL-LABEL: constraint_L:
171 ; ALL: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
172 ; ALL: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
173 ; ALL: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
174 ; ALL: #APP
175 ; LE32: or ${{[0-9]+}}, $[[FIRST]], ${{[0-9]+}}
176 ; BE32: or ${{[0-9]+}}, $[[SECOND]], ${{[0-9]+}}
177 ; ALL: #NO_APP
188 ; ALL-LABEL: constraint_M:
189 ; ALL: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
190 ; ALL: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
191 ; ALL: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
192 ; ALL: #APP
193 ; LE32: or ${{[0-9]+}}, $[[SECOND]], ${{[0-9]+}}
194 ; BE32: or ${{[0-9]+}}, $[[FIRST]], ${{[0-9]+}}
195 ; ALL: #NO_APP