Lines Matching +full:- +full:b
1 // This file is generated from a similarly-named Perl script in the BoringSSL
17 .arch armv8-a+crypto
22 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d // rotate-n-splat
33 // Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later.
35 stp x29,x30,[sp,#-16]!
37 mov x3,#-1
39 b.eq .Lenc_key_abort
41 b.eq .Lenc_key_abort
42 mov x3,#-2
44 b.lt .Lenc_key_abort
46 b.gt .Lenc_key_abort
48 b.ne .Lenc_key_abort
54 eor v0.16b,v0.16b,v0.16b
55 ld1 {v3.16b},[x0],#16
59 b.lt .Loop128
60 // 192-bit key support was removed.
61 b .L256
65 tbl v6.16b,{v3.16b},v2.16b
66 ext v5.16b,v0.16b,v3.16b,#12
68 aese v6.16b,v0.16b
71 eor v3.16b,v3.16b,v5.16b
72 ext v5.16b,v0.16b,v5.16b,#12
73 eor v3.16b,v3.16b,v5.16b
74 ext v5.16b,v0.16b,v5.16b,#12
75 eor v6.16b,v6.16b,v1.16b
76 eor v3.16b,v3.16b,v5.16b
77 shl v1.16b,v1.16b,#1
78 eor v3.16b,v3.16b,v6.16b
79 b.ne .Loop128
83 tbl v6.16b,{v3.16b},v2.16b
84 ext v5.16b,v0.16b,v3.16b,#12
86 aese v6.16b,v0.16b
88 eor v3.16b,v3.16b,v5.16b
89 ext v5.16b,v0.16b,v5.16b,#12
90 eor v3.16b,v3.16b,v5.16b
91 ext v5.16b,v0.16b,v5.16b,#12
92 eor v6.16b,v6.16b,v1.16b
93 eor v3.16b,v3.16b,v5.16b
94 shl v1.16b,v1.16b,#1
95 eor v3.16b,v3.16b,v6.16b
97 tbl v6.16b,{v3.16b},v2.16b
98 ext v5.16b,v0.16b,v3.16b,#12
100 aese v6.16b,v0.16b
102 eor v3.16b,v3.16b,v5.16b
103 ext v5.16b,v0.16b,v5.16b,#12
104 eor v3.16b,v3.16b,v5.16b
105 ext v5.16b,v0.16b,v5.16b,#12
106 eor v6.16b,v6.16b,v1.16b
107 eor v3.16b,v3.16b,v5.16b
108 eor v3.16b,v3.16b,v6.16b
113 b .Ldone
115 // 192-bit key support was removed.
119 ld1 {v4.16b},[x0]
125 tbl v6.16b,{v4.16b},v2.16b
126 ext v5.16b,v0.16b,v3.16b,#12
128 aese v6.16b,v0.16b
131 eor v3.16b,v3.16b,v5.16b
132 ext v5.16b,v0.16b,v5.16b,#12
133 eor v3.16b,v3.16b,v5.16b
134 ext v5.16b,v0.16b,v5.16b,#12
135 eor v6.16b,v6.16b,v1.16b
136 eor v3.16b,v3.16b,v5.16b
137 shl v1.16b,v1.16b,#1
138 eor v3.16b,v3.16b,v6.16b
140 b.eq .Ldone
143 ext v5.16b,v0.16b,v4.16b,#12
144 aese v6.16b,v0.16b
146 eor v4.16b,v4.16b,v5.16b
147 ext v5.16b,v0.16b,v5.16b,#12
148 eor v4.16b,v4.16b,v5.16b
149 ext v5.16b,v0.16b,v5.16b,#12
150 eor v4.16b,v4.16b,v5.16b
152 eor v4.16b,v4.16b,v6.16b
153 b .Loop256
163 .size GFp_aes_hw_set_encrypt_key,.-GFp_aes_hw_set_encrypt_key
172 ld1 {v2.16b},[x0]
177 aese v2.16b,v0.16b
178 aesmc v2.16b,v2.16b
181 aese v2.16b,v1.16b
182 aesmc v2.16b,v2.16b
184 b.gt .Loop_enc
186 aese v2.16b,v0.16b
187 aesmc v2.16b,v2.16b
189 aese v2.16b,v1.16b
190 eor v2.16b,v2.16b,v0.16b
192 st1 {v2.16b},[x1]
194 .size GFp_aes_hw_encrypt,.-GFp_aes_hw_encrypt
203 ld1 {v2.16b},[x0]
208 aesd v2.16b,v0.16b
209 aesimc v2.16b,v2.16b
212 aesd v2.16b,v1.16b
213 aesimc v2.16b,v2.16b
215 b.gt .Loop_dec
217 aesd v2.16b,v0.16b
218 aesimc v2.16b,v2.16b
220 aesd v2.16b,v1.16b
221 eor v2.16b,v2.16b,v0.16b
223 st1 {v2.16b},[x1]
225 .size GFp_aes_hw_decrypt,.-GFp_aes_hw_decrypt
231 // Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later.
233 stp x29,x30,[sp,#-16]!
253 // ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are
258 // single 32-bit lane has been updated the last time it was modified.
260 // This function uses a counter in one 32-bit lane. The vmov lines
261 // could write to v1.16b and v18.16b directly, but that trips this bugs.
262 // We write to v6.16b and copy to the final register as a workaround.
264 // [0] ARM-EPM-049219 v23 Cortex-A57 MPCore Software Developers Errata Notice
265 // [1] ARM-EPM-012079 v11.0 Cortex-A72 MPCore Software Developers Errata Notice
270 orr v6.16b,v0.16b,v0.16b
274 orr v1.16b,v6.16b,v6.16b
275 b.ls .Lctr32_tail
279 orr v18.16b,v6.16b,v6.16b
280 b .Loop3x_ctr32
284 aese v0.16b,v16.16b
285 aesmc v0.16b,v0.16b
286 aese v1.16b,v16.16b
287 aesmc v1.16b,v1.16b
288 aese v18.16b,v16.16b
289 aesmc v18.16b,v18.16b
292 aese v0.16b,v17.16b
293 aesmc v0.16b,v0.16b
294 aese v1.16b,v17.16b
295 aesmc v1.16b,v1.16b
296 aese v18.16b,v17.16b
297 aesmc v18.16b,v18.16b
299 b.gt .Loop3x_ctr32
301 aese v0.16b,v16.16b
302 aesmc v4.16b,v0.16b
303 aese v1.16b,v16.16b
304 aesmc v5.16b,v1.16b
305 ld1 {v2.16b},[x0],#16
307 aese v18.16b,v16.16b
308 aesmc v18.16b,v18.16b
309 ld1 {v3.16b},[x0],#16
311 aese v4.16b,v17.16b
312 aesmc v4.16b,v4.16b
313 aese v5.16b,v17.16b
314 aesmc v5.16b,v5.16b
315 ld1 {v19.16b},[x0],#16
317 aese v18.16b,v17.16b
318 aesmc v17.16b,v18.16b
319 aese v4.16b,v20.16b
320 aesmc v4.16b,v4.16b
321 aese v5.16b,v20.16b
322 aesmc v5.16b,v5.16b
323 eor v2.16b,v2.16b,v7.16b
325 aese v17.16b,v20.16b
326 aesmc v17.16b,v17.16b
327 eor v3.16b,v3.16b,v7.16b
329 aese v4.16b,v21.16b
330 aesmc v4.16b,v4.16b
331 aese v5.16b,v21.16b
332 aesmc v5.16b,v5.16b
333 // Note the logic to update v0.16b, v1.16b, and v1.16b is written to work
334 // around a bug in ARM Cortex-A57 and Cortex-A72 cores running in
335 // 32-bit mode. See the comment above.
336 eor v19.16b,v19.16b,v7.16b
338 aese v17.16b,v21.16b
339 aesmc v17.16b,v17.16b
340 orr v0.16b,v6.16b,v6.16b
342 aese v4.16b,v22.16b
343 aesmc v4.16b,v4.16b
346 aese v5.16b,v22.16b
347 aesmc v5.16b,v5.16b
348 orr v1.16b,v6.16b,v6.16b
350 aese v17.16b,v22.16b
351 aesmc v17.16b,v17.16b
352 orr v18.16b,v6.16b,v6.16b
354 aese v4.16b,v23.16b
355 aese v5.16b,v23.16b
356 aese v17.16b,v23.16b
358 eor v2.16b,v2.16b,v4.16b
359 ld1 {v16.4s},[x7],#16 // re-pre-load rndkey[0]
360 st1 {v2.16b},[x1],#16
361 eor v3.16b,v3.16b,v5.16b
363 st1 {v3.16b},[x1],#16
364 eor v19.16b,v19.16b,v17.16b
365 ld1 {v17.4s},[x7],#16 // re-pre-load rndkey[1]
366 st1 {v19.16b},[x1],#16
367 b.hs .Loop3x_ctr32
370 b.eq .Lctr32_done
376 aese v0.16b,v16.16b
377 aesmc v0.16b,v0.16b
378 aese v1.16b,v16.16b
379 aesmc v1.16b,v1.16b
382 aese v0.16b,v17.16b
383 aesmc v0.16b,v0.16b
384 aese v1.16b,v17.16b
385 aesmc v1.16b,v1.16b
387 b.gt .Lctr32_tail
389 aese v0.16b,v16.16b
390 aesmc v0.16b,v0.16b
391 aese v1.16b,v16.16b
392 aesmc v1.16b,v1.16b
393 aese v0.16b,v17.16b
394 aesmc v0.16b,v0.16b
395 aese v1.16b,v17.16b
396 aesmc v1.16b,v1.16b
397 ld1 {v2.16b},[x0],x12
398 aese v0.16b,v20.16b
399 aesmc v0.16b,v0.16b
400 aese v1.16b,v20.16b
401 aesmc v1.16b,v1.16b
402 ld1 {v3.16b},[x0]
403 aese v0.16b,v21.16b
404 aesmc v0.16b,v0.16b
405 aese v1.16b,v21.16b
406 aesmc v1.16b,v1.16b
407 eor v2.16b,v2.16b,v7.16b
408 aese v0.16b,v22.16b
409 aesmc v0.16b,v0.16b
410 aese v1.16b,v22.16b
411 aesmc v1.16b,v1.16b
412 eor v3.16b,v3.16b,v7.16b
413 aese v0.16b,v23.16b
414 aese v1.16b,v23.16b
417 eor v2.16b,v2.16b,v0.16b
418 eor v3.16b,v3.16b,v1.16b
419 st1 {v2.16b},[x1],#16
420 b.eq .Lctr32_done
421 st1 {v3.16b},[x1]
426 .size GFp_aes_hw_ctr32_encrypt_blocks,.-GFp_aes_hw_ctr32_encrypt_blocks
430 .section .note.GNU-stack,"",%progbits