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Tw*ODWC_BgA{Ũ^_#_!7**qT!B@x@B* 5""*BJ*VR> @*:@bb@ qB T )7 B*!**"&@8@cY@ (!Ț  _BT8@@@˗r@@!*!:@!} )S *G@*?#^{WOA8B CzA!3*`4C_>qHT`C_v>@!C#R7`b@v@!C#R 7`r@v@!`BBE92B9@!#`4 @! 4!@ 5*`"v@!C#R 7@`Bv@!`4 @! 4!5*`u9A8B_ TOEWD{B@^_#_!!!*!*C`6R! 5R! *!*!6It doesn't support Address Base TLB pinning. 3[%s] PCIe SysMMU feature is disabled!!! 3[%02d][%02d] VPN: %#010x, PPN: %#010x, ATTR: %#010x pcie-iommu-lv2tablepcie_iommu_initTrying mapping on 1MiB@%#09llx that is mappedUNKNOWN FAULTEnable map once. exynos_iommu_unmap_oncepcie_iommu_tlb_invalidate_all3TLB.%d has %d way, %d set. 3%s: Failed to create kmem cache 3ent(%#llx) == faddr(%#llx)... 3>> No Valid TLB Entries Unable to register handler of irq %d PTW ACCESS FAULTPAGE FAULTTrying mapping on %#09llx mapped with 1MiB page3Page table base is not in a valid memory region sysmmu,no-suspendEnable TLB Pinning. falseignore-tlb-invalThere is NO ignore tlb inval, so set default value(0) Probe HSI%d block, PCIe VID : %d exynos_iommu_map_once3AxID: %#x, AxLEN: %#x pcie-vid-numexynos_iommu_mapInvalid QoS value %d, use default. Invalid map once value (set to default -> false) 3unaligned: iova 0x%lx size 0x%zx min_pagesz 0x%x exynos_iommu_unmapport-name3------------- TLB[WAY][SET][ENTRY] ------------- 3%s: Failed(%d) to map %#zx bytes @ %#llx PCIe_CH0use-tlb-pinningtrueInvalid TLB pinning value (set to default -> false) %s: VA: 0x%llx's ref conunt is not 0 - SKIP unmap 3[%02d] VPN: %#010x, PPN: %#010x, ATTR: %#010x 3%s: Failed: size(%#zx)@%#llx is smaller than page size %#zx READ3Lv1 entry: %#010x 3PCIe SysMMU mapping Error! Fault occurred while System MMU %s is not enabled! 3System MMU has failed to access page table hsi-block-num3unaligned: iova 0x%lx pa 0x%pap sz 0x%zx min_pagesz 0x%x %s: Don't allow address + size over is section size (0x%llx + 0x%zx) %s: Duplicated Memory Allocation : PTE will be overwritten! pcie-sysmmu3From [%s], SysMMU %s %s at %#010lx (page table @ %pa) 3pgsize err: iova 0x%lx size 0x%zx unmapped 0x%zx 6Gen_pool is full!! Try dynamic alloc use-map-once3---------------------------------------------------------- 3The fault is not caused by this System MMU. WARNNING : There is NO PCIe VID!!! 3--- SBB(Second-Level Page Table Base Address Buffer --- %s: Can't alloc LV2 table! %s : LV1 entry fault! irq(%d) happened 3Please check IRQ and SFR base address. 3Page table base of driver: %pa Unable to find IRQ resource is probed. Version %d.%d.%d RESERVED6Page Table Base Address : 0x%pap 3SysMMU has %d TLBs, %d ports, %d sbb entries 3Failed to allocate lv2table gen pool Unrecoverable System MMU Fault!!Add SysMMU Page Fault Handler. 3>> No Valid SBB Entries WRITE3Lv2 entry: %#010x WARNNING : There is NO HSI block!!! L1Page Table Address : 0x%pap(phys) ACCESS FAULT3sysmmu(CP) lv2set_page: paddr: 0x%llx, size: 0x%lx, pent: 0x%x qosFailed to get resource info 3Try to IGNORE Page fault panic... SECURITY FAULT3PCIe SysMMU feature is disabled!!! author=Kisang Lee description=Exynos PCIe SysMMU driverlicense=GPL v2vermagic=5.10.157-android13-4-g6e771b230c52-ab10300981 SMP preempt mod_unload modversions aarch64name=exynos_pcie_iommuintree=Ydepends=scmversion=g6e771b230c52      samsung,pcie-sysmmuLinuxexynos_pcie_iommulumodule_layoutZstrncmp|Qpfn_valid zkfreeCfree_pages\j__get_free_pagesZ%strcmp[_|of_property_read_stringof_find_propertyC60of_property_read_variable_u32_array͚of_property_read_u32_indexFpanic',uatomic_notifier_call_chain__hwasan_store1_noabort#devm_request_threaded_irq#dplatform_get_irqT.ldevm_ioremap_resourceplatform_get_resource.3odevm_kmallocockmem_cache_alloc:Y+gen_pool_alloc_algo_ownergen_pool_availL"lgen_pool_destroyPkmem_cache_destroy\5P__platform_driver_probeQgen_pool_add_ownergen_pool_createkmalloc_order_trace\__hwasan_store8_noabort#kmem_cache_create5Jkmem_cache_freetUgen_pool_has_addrdmemset/cpu_hwcap_keys5arm64_const_caps_readyQd__kasan_check_write#G_dev_err$___ratelimitGV__warn_printkp\_raw_spin_unlock_irqrestorePVdma_sync_single_for_devicekimage_voffsetވmemstart_addrAjvabits_actual&__kasan_check_reads}=F__hwasan_load1_noabort 4_raw_spin_lock_irqsave__stack_chk_fail+atomic_notifier_chain_register[_dev_info| gen_pool_free_ownerKi__log_post_read_mmio__log_read_mmio4K_raw_spin_unlockN__tracepoint_rwmmio_post_readn5__tracepoint_rwmmio_readd_raw_spin_lock__hwasan_store4_noabort1__log_write_mmioprintk3\W__tracepoint_rwmmio_writet_A__hwasan_load4_noaborth'J__hwasan_load8_noabort1[__sanitizer_cov_trace_pcGNU}!U] 5^ܜ;lSOGNUDPyTy`l|00$T`ydyp|$8H\lxyy ,y0y<HPtx | T`lx(4<h048<HXdt 0<LXdp y$y0<Dhl p t|   8 P x        y y   y, y8 H \ d x            y y $ (  0  4 @ \   y y        L T \ h t         $ , :0 < :@ t |    $,@LT:X\:`p| ,<LXdp ,<HT`p|   l|yy0L\y$y$y y 0<LT`p0DL\pty8|y808Pdp|@DL\hlWpWt// $,tyy{{{( {($(0\{P`d{Pltgg (y8,y8<@HX| $!(,!0@LPTX\dltyy Pdty y $4`lx 0<lpx yy(4@Lh{xlp{xtx{ {$,@HTdt|  y8 y8  ( 8 \ d h p           !!!!!!$!{(!,!{0!4!R>R>T>\>h>t>>>>>>  8 $(, 04X8  q$(,<@Dwwww, w$wX(0w4wt8@wDwDHPw$Tw`X`w@dw|hpwtwTxwwlwwwwwwwwwPwwXwwtwwwww w$w8(0w4w8@wDwp HPw( Tw X`w@ dw hpw tw` xw w w ww ww ww wwP wxwX ww w ww8w wT w$wl(0w4w8@wDwHPwTwX`wdw(hpwtwDxww\ww|ww|QwxwwwQw w|!w w|!Qw#wx'w#wx'Qw$wh' w $$wh'(Q0w$4w'8@w$Dw'HQPw'Tw(X`w'dw((hpw`(tw(xwh(w(wt(w(w|(w )w(wP)w(wx)w-wd2w-wd2Qw,0wP2w40wP2Qw1wx2 w 1$wx2(Q0w24wD38@w3Dwd3HPw3Tw3X`w5dw6hpw5tw6xw(5w6w45w6wL5w6w\5w 7w|5w07w5wP7w5wx7w7w8w7w<8w:wX> w:$wp>(0w:4w>8@w:Dw:HPw,;Tw>X`w4;dw:hww> ww>wTw>$w(w>0w 4w><w @w>Hw Lw>TwT Xw>`wdw>lwpw>xw|w>ww>w'w|?wd(w?wx(w?w(w?w 5w?w05w?wX5w?w5w?w7w?w:w?w: w?w0;w?w ww$w(0w4<wx@HwLTwx!X`w'dlw$'pxw@'|w* w|1w@2wp6G y0$y0,8DL\hy y(LT||x|xXXF F $8P`p  $(w40w4HX\y8dy8lxw7yy$0wX8<HTX`hx $04 < DLTXlx~ ~  (8@LX\"d"t|\\PP` `$(0<HLTdlxEE``  ( ,48@DLPX\hl@t@|nneeddx(P}}w3w4w3w4w3w4PX`h/ p xAndroid (8508608, based on r450784e) clang version 14.0.7 (https://android.googlesource.com/toolchain/llvm-project 4c603efb0cca074e9238af8b4106c30add4418f6) mp  8 XO  0'0O5R% ^q Y z ;   +X$$  7 <<;n J 8S$E$f W     0 a l@7 WP (` Dp   > :q   >   &T Tq > \  x $@ >]    0 H H@ P , 5`] D bpR 0 >   !<I >p> y H > 3 T cT1 >o t \ f - '   `H >  W R0s l >@  P  x& >>`_ {p  >   4Xy$  ))  ,8 2 ' 0P  ~  a  (((-P( 3 j x   ! x((  |  Mj (y  x!  # #  $9 V $0 $ @ $s(o0 '9 $'|  . @'V?b }PK '  |?` 'p d(B ?i7 l( r x( ? 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.note.gnu.property.note.Linux.rela.init.text.rela.text.comment.init.plt.bss.rela.altinstructions__versions__ksymtab_strings.rodata.str.modinfo__ksymtab_gpl__kcrctab_gpl.rela___ksymtab_gpl+pcie_iommu_tlb_invalidate_all.rela___kcrctab_gpl+pcie_iommu_tlb_invalidate_all.note.GNU-stack.llvm_addrsig.text.ftrace_trampoline.rela.gnu.linkonce.this_module.rela__jump_table.rela__bug_table.note.gnu.build-id.rela___ksymtab+pcie_sysmmu_set_use_iocc.rela___kcrctab+pcie_sysmmu_set_use_iocc.shstrtab.strtab__ksymtab.symtab__kcrctab.rela.rodata.rela.ref.data.rodata.str1.1of_find_propertyalloc_lv2entrygen_pool_destroykmem_cache_destroyarm64_const_caps_readyof_property_read_variable_u32_arrayof_property_read_u32_indexg_last_devdump_sysmmu_tlb_port__hwasan_store8_noabort__hwasan_load8_noabort__hwasan_store4_noabort__hwasan_load4_noabort__hwasan_store1_noabort__hwasan_load1_noabort__sysmmu_disable_nocount__sysmmu_enable_nocountmax_req_cntwrong_pf_cnt___ratelimitmemsetkimage_voffsetsysmmu_parse_dtcpu_hwcap_keysexynos_iommu_unmap_once._rsexynos_iommu_map_once._rssysmmu_pm_ops____versions__get_free_pages_dev_errexynos_sysmmu_driveratomic_notifier_chain_registerlv2table_counteralloc_countergen_pool_alloc_algo_ownergen_pool_free_ownergen_pool_add_owner__kstrtabns_pcie_sysmmu_register_fault_handler__crc_pcie_sysmmu_register_fault_handler__kstrtab_pcie_sysmmu_register_fault_handler__ksymtab_pcie_sysmmu_register_fault_handlermemstart_addrgen_pool_has_addrexynos_sysmmu_irqplatform_get_irqdevm_request_threaded_irqstrcmpstrncmpexynos_iommu_unmap__kstrtabns_pcie_iommu_unmap__crc_pcie_iommu_unmap__kstrtab_pcie_iommu_unmap__ksymtab_pcie_iommu_unmap__kstrtabns_pcie_iommu_map__crc_pcie_iommu_map__kstrtab_pcie_iommu_map__ksymtab_pcie_iommu_map__log_write_mmio__log_post_read_mmio__log_read_mmio_dev_infoshow_fault_informationget_hw_versionfind_iovm_regionatomic_notifier_call_chainlv2table_pool__kstrtabns_pcie_iommu_tlb_invalidate_all__crc_pcie_iommu_tlb_invalidate_all__kstrtab_pcie_iommu_tlb_invalidate_all__ksymtab_pcie_iommu_tlb_invalidate_allgen_pool_avail__stack_chk_failvabits_actual__warn_printk_raw_spin_unlock_raw_spin_locksysmmu_of_matchof_property_read_string_raw_spin_lock_irqsave__tracepoint_rwmmio_write__kasan_check_writegen_pool_createkmem_cache_create__sysmmu_tlb_invalidate_raw_spin_unlock_irqrestoredump_tlb_entry_port_typeexynos_sysmmu_resumesysmmu_fault_nameinit_module__this_module__kstrtabns_pcie_sysmmu_disable__crc_pcie_sysmmu_disable__kstrtab_pcie_sysmmu_disable__ksymtab_pcie_sysmmu_disable__kstrtabns_pcie_sysmmu_enable__crc_pcie_sysmmu_enable__kstrtab_pcie_sysmmu_enable__ksymtab_pcie_sysmmu_enablelv2table_kmem_cache__kstrtabns_pcie_iommu_tlb_invalidate_range__crc_pcie_iommu_tlb_invalidate_range__kstrtab_pcie_iommu_tlb_invalidate_range__ksymtab_pcie_iommu_tlb_invalidate_rangelv2set_pagekfree__kstrtabns_pcie_sysmmu_all_buff_free__crc_pcie_sysmmu_all_buff_free__kstrtab_pcie_sysmmu_all_buff_free__ksymtab_pcie_sysmmu_all_buff_freekmem_cache_freeplatform_get_resourcedevm_ioremap_resourceexynos_iommu_unmap_onceexynos_iommu_map_oncedma_sync_single_for_devicekmalloc_order_traceexynos_sysmmu_probe__platform_driver_probeexynos_sysmmu_suspendpfn_valid__tracepoint_rwmmio_post_read__tracepoint_rwmmio_read__kasan_check_read__sanitizer_cov_trace_pcdevm_kmallocexynos_iommu_domain_allockmem_cache_allocpanic__kstrtabns_pcie_sysmmu_set_use_iocc__crc_pcie_sysmmu_set_use_iocc__kstrtab_pcie_sysmmu_set_use_iocc__ksymtab_pcie_sysmmu_set_use_iocc__kstrtabns_print_pcie_sysmmu_tlb__crc_print_pcie_sysmmu_tlb__kstrtab_print_pcie_sysmmu_tlb__ksymtab_print_pcie_sysmmu_tlbg_sysmmu_drvdata$d.199$d.99$d.289.Ltmp189$d.189$d.89$d.179$d.79$d.269$x.169$d.69$d.259$x.159$d.59$d.249$x.149$d.49$d.239$x.139$d.39$d.229$d.129$d.29$d.219$d.119$d.19$d.209$d.109$d.9$x.198$x.98$x.188$x.88$d.278$x.178$x.78__UNIQUE_ID_scmversion268$x.268.Ltmp168$d.168$x.68$x.258$d.158$x.58.Ltmp248$x.248$d.148$x.48$x.238.Ltmp138$d.138$x.38$x.228$x.128$x.28exynos_iommu_unmap_once._rs.28$x.218$x.118exynos_iommu_map_once._rs.18$d.18$x.208$x.108$d.8_note_7$d.197$d.97$d.187$d.87$d.277$d.177$d.77__UNIQUE_ID_depends267$d.267$x.167$d.67$d.257$x.157$d.57$d.247$x.147$d.47$d.237$x.137$d.37$d.227$d.127$d.27$d.217$d.117$d.17$d.207$d.107$d.7$x.196$x.96.Ltmp186$x.186$x.86$x.276$x.176$x.76__UNIQUE_ID_intree266$x.266$d.166$x.66$x.256.Ltmp156$d.156$x.56$x.246$d.146$x.46$x.236$d.136$x.36$x.226$x.126$x.26$x.216$x.116$d.16$x.206$x.106$d.6$d.195$d.95$d.185$d.85$d.275$x.175$d.75__UNIQUE_ID_name265$d.265$x.165$d.65$d.255$x.155$d.55.Ltmp245$d.245$x.145$d.45$d.235.Ltmp135$x.135$d.35$d.225$d.125$d.25$d.215$d.115$d.15$d.205$d.105$d.5$x.194$x.94$x.184$x.84$x.274$d.174$x.74__UNIQUE_ID_vermagic264$x.264$d.164$x.64$x.254$d.154$x.54$x.244.Ltmp144$d.144$x.44$x.234$d.134$x.34$x.224$x.124$x.24$x.214$x.114$d.14$x.204$x.104$d.4$d.193$d.93$d.283.Ltmp183$d.183$d.83$d.273$x.173$d.73$d.263$x.163$d.63$d.253$x.153$d.53$d.243$x.143$d.43.Ltmp233$d.233$x.133$d.33__UNIQUE_ID_license423$d.223$d.123$d.23$d.213$d.113$d.13$d.203$d.103$d.3$x.192$x.92$d.282$x.182$x.82$x.272$d.172$x.72$x.262$d.162$x.62$x.252$d.152$x.52$x.242$d.142$x.42$x.232.Ltmp132$d.132$x.32__UNIQUE_ID_description422$x.222$x.122$x.22$x.212$x.112$d.12$x.202$x.102$d.2$d.191$d.91$d.281$d.181$d.81$d.271$x.171$d.71$d.261$x.161$d.61$d.251$x.151$d.51$d.241.Ltmp141$x.141$d.41$d.231$x.131$d.31__UNIQUE_ID_author421$d.221$d.121$d.21$d.211$d.111$d.11$d.201$d.101$d.1$x.190$x.90$d.280$x.180$x.80$x.270$d.170$x.70$x.260$d.160$x.60$x.250.Ltmp150$d.150$x.50$x.240$d.140$x.40$x.230$d.130$x.30exynos_iommu_unmap_once._rs.30$x.220$x.120exynos_iommu_map_once._rs.20$d.20$x.210$x.110$d.10.Ltmp300$x.200$x.100 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