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Searched defs:Add (Results 1 – 25 of 34) sorted by relevance

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/art/compiler/utils/arm/
Dassembler_arm_vixl.cc154 ___ Add(temp, base, add_to_base); in AdjustLoadStoreOffset() local
158 ___ Add(temp, temp, base); in AdjustLoadStoreOffset() local
323 ___ Add(dest, dest, (dest.Is(base)) ? temp : base); in LoadFromOffset() local
393 ___ Add(base, sp, Operand::From(stack_offset)); in StoreRegisterList() local
413 ___ Add(base, sp, Operand::From(stack_offset)); in LoadRegisterList() local
441 ___ Add(rd, rn, value); in AddConstant() local
Dassembler_arm_vixl.h134 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { in Add() function
/art/runtime/gc/collector/
Dobject_byte_pair.h29 void Add(const ObjectBytePair& other) { in Add() function
/art/runtime/interpreter/
Dsafe_math_test.cc26 TEST(SafeMath, Add) { in TEST() argument
/art/libartbase/base/metrics/
Dmetrics.h266 void Add(value_t value) { value_.fetch_add(value, std::memory_order::memory_order_relaxed); } in Add() function
306 void Add(value_t value) { in Add() function
350 void Add(int64_t value) { in Add() function
405 void Add(T value) { in Add() function
/art/runtime/
Dsignal_set.h42 void Add(int signal) { in Add() function
Dindirect_reference_table-inl.h102 inline void IrtEntry::Add(ObjPtr<mirror::Object> obj) { in Add() function
Dreference_table.cc49 void ReferenceTable::Add(ObjPtr<mirror::Object> obj) { in Add() function in art::ReferenceTable
Dindirect_reference_table.cc305 IndirectRef IndirectReferenceTable::Add(IRTSegmentState previous_state, in Add() function in art::IndirectReferenceTable
/art/libprofile/profile/
Dprofile_boot_info.cc29 void ProfileBootInfo::Add(const DexFile* dex_file, uint32_t method_index) { in Add() function in art::ProfileBootInfo
/art/compiler/optimizing/
Dintrinsics_arm_vixl.cc90 __ Add(base, array, element_size * constant + data_offset); in GenSystemArrayCopyBaseAddress() local
92 __ Add(base, array, Operand(RegisterFrom(pos), vixl32::LSL, element_size_shift)); in GenSystemArrayCopyBaseAddress() local
93 __ Add(base, base, data_offset); in GenSystemArrayCopyBaseAddress() local
112 __ Add(end, base, element_size * constant); in GenSystemArrayCopyEndAddress() local
114 __ Add(end, base, Operand(RegisterFrom(copy_length), vixl32::LSL, element_size_shift)); in GenSystemArrayCopyEndAddress() local
320 __ Add(out, out, 32); in GenNumberOfLeadingZeros() local
364 __ Add(out, out, 32); in GenNumberOfTrailingZeros() local
743 __ Add(temp1, temp1, char_size * 2); in GenerateStringCompareToLoop() local
749 __ Add(temp1, temp1, char_size * 2); in GenerateStringCompareToLoop() local
825 __ Add(temp0, temp0, temp0); // Unlike LSL, this ADD is always 16-bit. in GenerateStringCompareToLoop() local
[all …]
Dintrinsics_arm64.cc719 __ Add(temp, base, offset.W()); // Offset should not exceed 32 bits. in GenUnsafeGet() local
1369 __ Add(tmp_ptr, base_.X(), Operand(offset_)); in EmitNativeCode() local
1479 __ Add(tmp_ptr, base.X(), Operand(offset)); in GenUnsafeCas() local
1656 __ Add(new_value, old_value_reg, arg.IsX() ? arg.X() : arg.W()); in GenerateGetAndUpdate() local
1792 __ Add(temp1, temp1, char_size * 4); in VisitStringCompareTo() local
1859 __ Add(temp1, temp1, Operand(value_offset)); in VisitStringCompareTo() local
1860 __ Add(temp2, temp2, Operand(value_offset)); in VisitStringCompareTo() local
2077 __ Add(temp1, temp1, Operand(sizeof(uint64_t))); in VisitStringEquals() local
2494 __ Add(dst_ptr, dstObj, Operand(data_offset)); in VisitStringGetCharsNoCheck() local
2495 __ Add(dst_ptr, dst_ptr, Operand(dstBegin, LSL, 1)); in VisitStringGetCharsNoCheck() local
[all …]
Dcode_generator_arm_vixl.cc209 __ Add(base, sp, Operand::From(stack_offset)); in SaveContiguousSRegisterList() local
257 __ Add(base, sp, Operand::From(stack_offset)); in RestoreContiguousSRegisterList() local
836 __ Add(index_reg, index_reg, offset_); in EmitNativeCode() local
1141 __ Add(out, first, second); in GenerateDataProcInstruction() local
2206 __ Add(temp, temp, -1); in MaybeIncrementHotness() local
4125 __ Add(OutputRegister(add), InputRegisterAt(add, 0), InputOperandAt(add, 1)); in VisitAdd() local
4277 __ Add(out_hi, out_hi, temp); in VisitMul() local
4383 __ Add(out, dividend, Operand(add_right_input, vixl32::LSR, 32 - ctz_imm)); in DivRemByPowerOfTwo() local
4437 __ Add(temp1, temp1, dividend); in GenerateDivRemWithAnyConstant() local
4459 __ Add(temp1, temp1, dividend); in GenerateDivRemWithAnyConstant() local
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Dcode_generator_arm64.cc676 __ Add(index_reg, index_reg, Operand(offset_)); in EmitNativeCode() local
1209 __ Add(counter, counter, -1); in MaybeIncrementHotness() local
1228 __ Add(counter, counter, -1); in MaybeIncrementHotness() local
1692 __ Add(temp_base, src.GetBaseRegister(), OperandFromMemOperand(src)); in LoadAcquire() local
1802 __ Add(temp_base, dst.GetBaseRegister(), op); in StoreRelease() local
2227 __ Add(dst, lhs, rhs); in HandleBinaryOp() local
2428 __ Add(out, left, right_operand); in VisitDataProcWithShifterOp() local
2461 __ Add(OutputRegister(instruction), in VisitIntermediateAddress() local
2491 __ Add(OutputRegister(instruction), index_reg, offset); in VisitIntermediateAddressIndex() local
2494 __ Add(OutputRegister(instruction), offset_reg, Operand(index_reg, LSL, shift)); in VisitIntermediateAddressIndex() local
[all …]
Dcode_generator_vector_arm64_neon.cc449 __ Add(dst.V16B(), lhs.V16B(), rhs.V16B()); in VisitVecAdd() local
454 __ Add(dst.V8H(), lhs.V8H(), rhs.V8H()); in VisitVecAdd() local
458 __ Add(dst.V4S(), lhs.V4S(), rhs.V4S()); in VisitVecAdd() local
462 __ Add(dst.V2D(), lhs.V2D(), rhs.V2D()); in VisitVecAdd() local
1285 __ Add(acc.V4S(), acc.V4S(), tmp.V4S()); in VisitVecSADAccumulate() local
1306 __ Add(acc.V2D(), acc.V2D(), tmp.V2D()); in VisitVecSADAccumulate() local
Dcode_generator_vector_arm_vixl.cc920 __ Add(*scratch, base, Operand(RegisterFrom(index), ShiftType::LSL, shift)); in VecAddress() local
943 __ Add(*scratch, base, offset); in VecAddressUnaligned() local
946 __ Add(*scratch, base, offset); in VecAddressUnaligned() local
947 __ Add(*scratch, *scratch, Operand(RegisterFrom(index), ShiftType::LSL, shift)); in VecAddressUnaligned() local
Dcode_generator_vector_arm64_sve.cc449 __ Add(dst.VnB(), p_reg, lhs.VnB(), rhs.VnB()); in VisitVecAdd() local
453 __ Add(dst.VnH(), p_reg, lhs.VnH(), rhs.VnH()); in VisitVecAdd() local
456 __ Add(dst.VnS(), p_reg, lhs.VnS(), rhs.VnS()); in VisitVecAdd() local
459 __ Add(dst.VnD(), p_reg, lhs.VnD(), rhs.VnD()); in VisitVecAdd() local
Dgvn.cc84 void Add(HInstruction* instruction) { in Add() function in art::ValueSet
/art/libelffile/elf/
Delf_builder.h238 Elf_Word Add(const void* data, size_t length) { in Add() function
281 Elf_Word Add(const std::string& name) { in Add() function
359 void Add(Elf_Word name, in Add() function
375 void Add(Elf_Sym sym, const Section* section) { in Add() function
/art/runtime/base/
Dtiming_logger.h53 void Add(uint64_t time) { time_ += time; } in Add() function
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc124 ___ Add(reg_x(rd), reg_x(rn), value); in AddConstant() local
131 ___ Add(temp, reg_x(rn), value); in AddConstant() local
217 ___ Add(scratch, reg_x(SP), fr_offs.Int32Value()); in StoreStackOffsetToThread() local
857 ___ Add(scratch, reg_x(SP), spilled_reference_offset.Int32Value()); in CreateJObject() local
873 ___ Add(scratch, reg_x(SP), spilled_reference_offset.Int32Value()); in CreateJObject() local
880 ___ Add(scratch, reg_x(SP), spilled_reference_offset.Int32Value()); in CreateJObject() local
/art/test/660-clinit/src/
DMain.java199 class Add { class
/art/libartbase/base/
Dbit_table.h301 void Add(Entry value) { in Add() function
/art/tools/dexanalyze/
Ddexanalyze_bytecode.cc525 void NewRegisterInstructions::Add(Instruction::Code opcode, const Instruction& inst) { in Add() function in art::dexanalyze::NewRegisterInstructions
/art/tools/signal_dumper/
Dsignal_dumper.cc62 void Add(int signal) { in Add() function in art::__anon2acf11b80111::timeout_signal::SignalSet

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