| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 452 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
641 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
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| D | Thumb2InstrInfo.cpp | 458 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
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| D | ThumbRegisterInfo.cpp | 362 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
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| D | ARMBaseInstrInfo.cpp | 145 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); in convertToThreeAddress() local
2148 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteARMFrameIndex() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 500 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
686 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
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| D | Thumb2InstrInfo.cpp | 479 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
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| D | ThumbRegisterInfo.cpp | 371 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
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| D | ARMBaseInstrInfo.cpp | 168 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); in convertToThreeAddress() local
2522 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteARMFrameIndex() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1590 struct AddrMode { struct
1595 AddrMode() : BaseGV(nullptr), BaseOffs(0), HasBaseReg(false), Scale(0) {} in AddrMode() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/Disassembler/ |
| D | MSP430Disassembler.cpp | 142 enum AddrMode { enum
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonBaseInfo.h | 35 enum AddrMode { enum
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 185 enum AddrMode { enum
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonBaseInfo.h | 83 enum AddrMode { enum
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 2167 struct AddrMode { struct
2172 AddrMode() = default; argument
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 235 enum AddrMode { enum
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| /external/vixl/src/aarch64/ |
| D | instructions-aarch64.h | 175 enum AddrMode { Offset, PreIndex, PostIndex }; enum
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | CodeGenPrepare.cpp | 2865 ExtAddrMode &AddrMode; member in __anon7fefc6880711::AddressingModeMatcher
4860 ExtAddrMode AddrMode = AddrModes.getAddrMode(); in optimizeMemoryInst() local
5429 TargetLowering::AddrMode AddrMode; in splitLargeGEPOffsets() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstMIPS32.h | 121 enum AddrMode { Offset }; enum
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| D | IceInstARM32.h | 88 enum AddrMode { enum
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| /external/llvm/lib/CodeGen/ |
| D | CodeGenPrepare.cpp | 2597 ExtAddrMode &AddrMode; member in __anona1666ce60211::AddressingModeMatcher
3724 ExtAddrMode AddrMode; in optimizeMemoryInst() local
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.h | 57 enum AddrMode { Offset = 0, PreIndex = 1, PostIndex = 2 }; enum
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