/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCCallingConv.cpp | 26 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_Dummy() 34 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignArgRegs() 60 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() 84 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() 112 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SPE_CustomSplitFP64() 141 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SPE_RetF64()
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D | PPCFastISel.cpp | 1377 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() 1601 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in fastLowerCall() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86CallingConv.cpp | 29 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_RegCall_Assign2Regs() 93 ISD::ArgFlagsTy &ArgFlags, in CC_X86_VectorCallAssignRegister() 130 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_X86_64_VectorCall() 190 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_X86_32_VectorCall() 239 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_X86_32_MCUInReg() 299 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_X86_Intr()
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/external/rust/crates/clap/src/args/ |
D | settings.rs | 33 pub struct ArgFlags(Flags); struct 35 impl ArgFlags { implementation 64 impl Default for ArgFlags { implementation
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/external/llvm/lib/CodeGen/ |
D | CallingConvLower.cpp | 47 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() 76 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local 94 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local 108 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local 126 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local 144 ISD::ArgFlagsTy ArgFlags = Flags[i]; in AnalyzeCallOperands() local
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/external/llvm/lib/Target/ARM/ |
D | ARMCallingConv.h | 60 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_APCS_Custom_f64() 114 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_f64() 146 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_APCS_Custom_f64() 157 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() 182 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_Aggregate()
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D | ARMFastISel.cpp | 1873 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() 2211 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local 2321 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
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/external/llvm/lib/Target/AArch64/ |
D | AArch64CallingConvention.h | 45 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, in finishStackBlock() 67 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block() 86 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Block()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | CallingConvLower.cpp | 45 int MinAlignment, ISD::ArgFlagsTy ArgFlags) { in HandleByVal() 92 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local 105 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local 119 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local 132 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local 150 ISD::ArgFlagsTy ArgFlags = Flags[i]; in AnalyzeCallOperands() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMCallingConv.cpp | 53 ISD::ArgFlagsTy ArgFlags, in CC_ARM_APCS_Custom_f64() 107 ISD::ArgFlagsTy ArgFlags, in CC_ARM_AAPCS_Custom_f64() 139 ISD::ArgFlagsTy ArgFlags, in RetCC_ARM_APCS_Custom_f64() 150 ISD::ArgFlagsTy ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() 175 ISD::ArgFlagsTy ArgFlags, in CC_ARM_AAPCS_Custom_Aggregate()
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D | ARMFastISel.cpp | 1890 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() 2228 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local 2336 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64CallingConvention.cpp | 40 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, in finishStackBlock() 64 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block() 83 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Block()
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/external/llvm/lib/Target/X86/ |
D | X86CallingConv.h | 27 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_VectorCallIndirect() 49 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_MCUInReg()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZCallingConv.h | 91 ISD::ArgFlagsTy &ArgFlags, in CC_SystemZ_I128Indirect()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZCallingConv.h | 90 ISD::ArgFlagsTy &ArgFlags, in CC_SystemZ_I128Indirect()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 147 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg() 221 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon() 274 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon32() 292 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon64() 317 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_HexagonVector() 386 ISD::ArgFlagsTy ArgFlags, CCState &State) { in RetCC_Hexagon() 448 ISD::ArgFlagsTy ArgFlags, CCState &State) { in RetCC_Hexagon32() 463 ISD::ArgFlagsTy ArgFlags, CCState &State) { in RetCC_Hexagon64() 478 ISD::ArgFlagsTy ArgFlags, CCState &State) { in RetCC_HexagonVector()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVISelLowering.cpp | 1461 ISD::ArgFlagsTy ArgFlags, CCState &State, bool IsFixed, in CC_RISCV() 1638 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in analyzeInputArgs() local 1664 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in analyzeOutputArgs() local 1823 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_RISCV_FastCC() 2376 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CanLowerReturn() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 43 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet() 56 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Split_64() 84 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Ret_Split_64() 108 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full() 153 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half()
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 41 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet() 54 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Split_64() 82 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Ret_Split_64() 106 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full() 151 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half()
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/external/clang/include/clang/Basic/ |
D | IdentifierTable.h | 636 ArgFlags = ZeroArg|OneArg enumerator
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 1280 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() 1511 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in fastLowerCall() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 280 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() 286 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64()
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D | MipsISelLowering.cpp | 2855 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, in CC_MipsO32() 2968 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() 2976 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64()
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/external/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 230 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() 236 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64()
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D | MipsISelLowering.cpp | 2451 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, in CC_MipsO32() 2541 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() 2549 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64()
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