1 /*
2 * Copyright (c) 2016-2020 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "arm_compute/runtime/NEON/functions/NEGaussian5x5.h"
25
26 #include "arm_compute/core/ITensor.h"
27 #include "arm_compute/core/PixelValue.h"
28 #include "arm_compute/core/TensorInfo.h"
29 #include "arm_compute/runtime/NEON/NEScheduler.h"
30 #include "arm_compute/runtime/TensorAllocator.h"
31 #include "src/core/NEON/kernels/NEFillBorderKernel.h"
32 #include "src/core/NEON/kernels/NEGaussian5x5Kernel.h"
33 #include "support/MemorySupport.h"
34
35 namespace arm_compute
36 {
37 NEGaussian5x5::~NEGaussian5x5() = default;
38
NEGaussian5x5(std::shared_ptr<IMemoryManager> memory_manager)39 NEGaussian5x5::NEGaussian5x5(std::shared_ptr<IMemoryManager> memory_manager)
40 : _memory_group(std::move(memory_manager)), _kernel_hor(), _kernel_vert(), _tmp(), _border_handler()
41 {
42 }
43
configure(ITensor * input,ITensor * output,BorderMode border_mode,uint8_t constant_border_value)44 void NEGaussian5x5::configure(ITensor *input, ITensor *output, BorderMode border_mode, uint8_t constant_border_value)
45 {
46 // Init temporary buffer
47 TensorInfo tensor_info(input->info()->tensor_shape(), 1, DataType::S16);
48 _tmp.allocator()->init(tensor_info);
49
50 // Manage intermediate buffers
51 _memory_group.manage(&_tmp);
52
53 _kernel_hor = arm_compute::support::cpp14::make_unique<NEGaussian5x5HorKernel>();
54 _kernel_vert = arm_compute::support::cpp14::make_unique<NEGaussian5x5VertKernel>();
55 _border_handler = arm_compute::support::cpp14::make_unique<NEFillBorderKernel>();
56
57 // Create and configure kernels for the two passes
58 _kernel_hor->configure(input, &_tmp, border_mode == BorderMode::UNDEFINED);
59 _kernel_vert->configure(&_tmp, output, border_mode == BorderMode::UNDEFINED);
60
61 _tmp.allocator()->allocate();
62
63 _border_handler->configure(input, _kernel_hor->border_size(), border_mode, PixelValue(constant_border_value));
64 }
65
run()66 void NEGaussian5x5::run()
67 {
68 NEScheduler::get().schedule(_border_handler.get(), Window::DimZ);
69
70 MemoryGroupResourceScope scope_mg(_memory_group);
71
72 NEScheduler::get().schedule(_kernel_hor.get(), Window::DimY);
73 NEScheduler::get().schedule(_kernel_vert.get(), Window::DimY);
74 }
75 } // namespace arm_compute