| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFrameLowering.cpp | 159 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
200 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFrameLowering.cpp | 193 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
247 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.cpp | 1040 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1054 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1123 unsigned OffsetReg, in buildIndirectWrite()
1155 unsigned OffsetReg, in buildIndirectRead()
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| D | SIFrameLowering.cpp | 120 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildPrologSpill() local
167 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildEpilogReload() local
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| D | AMDGPUCallLowering.cpp | 356 Register OffsetReg = MRI.createGenericVirtualRegister(LLT::scalar(64)); in lowerParameterPtr() local
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| D | SIRegisterInfo.cpp | 362 Register OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in materializeFrameBaseRegister() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.cpp | 1059 unsigned OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1073 unsigned OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1143 unsigned OffsetReg, in buildIndirectWrite()
1175 unsigned OffsetReg, in buildIndirectRead()
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| D | SIRegisterInfo.cpp | 293 unsigned OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in materializeFrameBaseRegister() local
346 unsigned OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in resolveFrameIndex() local
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 540 unsigned OffsetReg = MI.getOperand(FrameRegIdx+1).getReg(); in rewriteT2FrameIndex() local
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| D | Thumb2SizeReduction.cpp | 528 unsigned OffsetReg = 0; in ReduceLoadStore() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 566 Register OffsetReg = MI.getOperand(FrameRegIdx + 1).getReg(); in rewriteT2FrameIndex() local
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| D | ARMCallLowering.cpp | 105 Register OffsetReg = MRI.createGenericVirtualRegister(s32); in getStackAddress() local
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| D | Thumb2SizeReduction.cpp | 557 unsigned OffsetReg = 0; in ReduceLoadStore() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 130 unsigned OffsetReg; member
624 unsigned OffsetReg = Op->getReg(); in MorphToMemRegReg() local
|
| /external/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 115 unsigned OffsetReg; member
608 unsigned OffsetReg = Op->getReg(); in MorphToMemRegReg() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 114 Register OffsetReg = MRI.createGenericVirtualRegister(SType); in getStackAddress() local
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 715 unsigned OffsetReg = I->getOperand(0).getReg(); in expandEhReturn() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 881 Register OffsetReg = I->getOperand(0).getReg(); in expandEhReturn() local
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| D | MipsCallLowering.cpp | 297 Register OffsetReg = MRI.createGenericVirtualRegister(s32); in getStackAddress() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonOptAddrMode.cpp | 147 unsigned OffsetReg = MI->getOperand(2).getReg(); in canRemoveAddasl() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonOptAddrMode.cpp | 166 Register OffsetReg = MI.getOperand(2).getReg(); in canRemoveAddasl() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 159 Register OffsetReg = MRI.createGenericVirtualRegister(s64); in getStackAddress() local
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 212 unsigned OffsetReg; member
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 241 unsigned OffsetReg; member
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringARM32.cpp | 5291 const Variable *OffsetReg, int16_t OffsetRegShAmt, in dumpAddressOpt()
5367 Variable **OffsetReg, int32_t OffsetRegShamt, in matchCombinedBaseIndex()
5406 Variable **OffsetReg, OperandARM32::ShiftKind *Kind, in matchShiftedOffsetReg()
5568 Variable *OffsetReg = nullptr; in formAddressingMode() local
|