| /external/clang/test/OpenMP/ |
| D | target_exit_data_codegen.cpp | 16 struct ST { struct
21 ST<int> gb; argument
146 struct ST { struct
163 ST<int> A; in bar() argument
|
| D | target_data_codegen.cpp | 16 struct ST { struct
21 ST<int> gb; argument
163 struct ST { struct
180 ST<int> A; in bar() argument
|
| D | target_enter_data_codegen.cpp | 16 struct ST { struct
21 ST<int> gb; argument
146 struct ST { struct
163 ST<int> A; in bar() argument
|
| D | target_update_codegen.cpp | 16 struct ST { struct
21 ST<int> gb; argument
144 struct ST { struct
161 ST<int> A; in bar() argument
|
| D | target_codegen_registration.cpp | 272 struct ST { struct
280 ST() { in ST() function
286 ~ST() { in ~ST() argument
|
| D | threadprivate_ast_print.cpp | 36 struct ST { struct
44 v = ST<T>::m; in foo() argument
|
| /external/clang/test/CodeGenCXX/ |
| D | reference-in-block-args.cpp | 6 struct ST { struct
11 void OUTER_BLOCK(void (^fixer)(ST& ref)) { argument
|
| D | mangle-lambdas.cpp | 73 struct ST { struct
80 void test_ST(ST<double> st) { in test_ST() argument
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 27 static ArrayRef<MCPhysReg> getAllSGPR128(const GCNSubtarget &ST, in getAllSGPR128()
33 static ArrayRef<MCPhysReg> getAllSGPRs(const GCNSubtarget &ST, in getAllSGPRs()
187 void SIFrameLowering::emitFlatScratchInit(const GCNSubtarget &ST, in emitFlatScratchInit()
270 const GCNSubtarget &ST, in getReservedPrivateSegmentBufferReg()
320 const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI, in getReservedPrivateSegmentWaveByteOffsetReg()
404 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionPrologue() local
533 void SIFrameLowering::emitEntryFunctionScratchSetup(const GCNSubtarget &ST, in emitEntryFunctionScratchSetup()
686 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitPrologue() local
828 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEpilogue() local
950 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in processFunctionBeforeFrameFinalized() local
[all …]
|
| D | SIOptimizeExecMaskingPreRA.cpp | 87 const GCNSubtarget &ST) { in isEndCF()
97 static bool isFullExecCopy(const MachineInstr& MI, const GCNSubtarget& ST) { in isFullExecCopy()
110 const GCNSubtarget& ST) { in getOrNonExecReg()
124 const GCNSubtarget& ST) { in getOrExecSource()
190 const GCNSubtarget &ST, in optimizeVcndVcmpPair()
298 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local
|
| D | GCNIterativeScheduler.cpp | 110 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printRegions() local
134 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printSchedRP() local
420 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleRegion() local
435 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in sortRegionsByPressure() local
452 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in tryMaximizeOccupancy() local
489 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleLegacyMaxOccupancy() local
543 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleMinReg() local
577 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleILP() local
|
| D | SIOptimizeExecMasking.cpp | 60 static Register isCopyFromExec(const MachineInstr &MI, const GCNSubtarget &ST) { in isCopyFromExec()
78 static Register isCopyToExec(const MachineInstr &MI, const GCNSubtarget &ST) { in isCopyToExec()
240 const GCNSubtarget &ST, in findExecCopy()
272 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local
|
| D | SIMachineFunctionInfo.cpp | 50 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in SIMachineFunctionInfo() local
182 const GCNSubtarget& ST = MF.getSubtarget<GCNSubtarget>(); in limitOccupancy() local
254 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in haveFreeLanesForSGPRSpill() local
268 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateSGPRSpillToVGPR() local
328 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateVGPRSpillToAGPR() local
|
| D | AMDGPUTargetTransformInfo.h | 49 const GCNSubtarget *ST; variable
72 const GCNSubtarget *ST; variable
239 const R600Subtarget *ST; variable
|
| D | SIInsertSkips.cpp | 247 const GCNSubtarget &ST = MBB.getParent()->getSubtarget<GCNSubtarget>(); in kill() local
275 const GCNSubtarget &ST = MF->getSubtarget<GCNSubtarget>(); in kill() local
346 const GCNSubtarget &ST = MBB.getParent()->getSubtarget<GCNSubtarget>(); in optimizeVccBranch() local
430 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local
|
| D | AMDGPUPromoteAlloca.cpp | 160 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(*TM, F); in runOnFunction() local
185 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(*TM, F); in getLocalSizeYZ() local
271 const AMDGPUSubtarget &ST = in getWorkitemID() local
629 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(*TM, F); in hasSufficientLocalMem() local
759 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(*TM, ContainingFunction); in handleAlloca() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsLegalizerInfo.cpp | 53 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { in MipsLegalizerInfo()
319 const MipsSubtarget &ST) { in SelectMSA3OpIntrinsic()
334 const MipsSubtarget &ST) { in MSA3OpIntrinsicToGeneric()
346 const MipsSubtarget &ST) { in MSA2OpIntrinsicToGeneric()
358 const MipsSubtarget &ST = in legalizeIntrinsic() local
|
| /external/llvm/lib/IR/ |
| D | SymbolTableListTraitsImpl.h | 69 if (ValueSymbolTable *ST = getSymTab(Owner)) in addNodeToList() local
78 if (ValueSymbolTable *ST = getSymTab(getListOwner())) in removeNodeFromList() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | SymbolTableListTraitsImpl.h | 68 if (ValueSymbolTable *ST = getSymTab(Owner)) in addNodeToList() local
77 if (ValueSymbolTable *ST = getSymTab(getListOwner())) in removeNodeFromList() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstrInfo.cpp | 33 AMDGPUInstrInfo::AMDGPUInstrInfo(const AMDGPUSubtarget &ST) in AMDGPUInstrInfo()
88 static SIEncodingFamily subtargetEncodingFamily(const AMDGPUSubtarget &ST) { in subtargetEncodingFamily()
|
| D | SIMachineFunctionInfo.cpp | 85 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); local
191 const SISubtarget &ST = MF->getSubtarget<SISubtarget>(); in getSpilledReg() local
|
| D | SIRegisterInfo.cpp | 29 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); in getMaxWaveCountPerSIMD() local
38 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); in getMaxWorkGroupSGPRCount() local
199 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); in getReservedRegs() local
422 const SISubtarget &ST = MF->getSubtarget<SISubtarget>(); in buildScratchLoadStore() local
503 const SISubtarget &ST = MF->getSubtarget<SISubtarget>(); in eliminateFrameIndex() local
912 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); in getPreloadedValue() local
983 unsigned SIRegisterInfo::getNumSGPRsAllowed(const SISubtarget &ST, in getNumSGPRsAllowed()
|
| /external/tensorflow/tensorflow/core/kernels/ |
| D | sparse_dense_binary_op_shared_test.cc | 232 struct ST { struct
233 Node* indices;
234 Node* vals;
235 Node* shape;
|
| /external/libcxx/test/std/utilities/meta/meta.rel/ |
| D | is_invocable.pass.cpp | 73 using ST = std::unique_ptr<Tag>; in main() typedef
110 using ST = std::unique_ptr<Tag>; in main() typedef
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVLegalizerInfo.cpp | 21 RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) { in RISCVLegalizerInfo()
|