1 // Copyright 2019 The Pigweed Authors 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); you may not 4 // use this file except in compliance with the License. You may obtain a copy of 5 // the License at 6 // 7 // https://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 11 // WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the 12 // License for the specific language governing permissions and limitations under 13 // the License. 14 #pragma once 15 16 #ifdef __cplusplus 17 18 #include <cstdint> 19 20 #include "pw_preprocessor/arch.h" 21 #include "pw_preprocessor/compiler.h" 22 23 namespace pw::cpu_exception::cortex_m { 24 25 // The PC, LR, and PSR registers are not captured when the program stack 26 // pointer is in an MPU-protected or otherwise invalid memory region. In 27 // these situations, the registers are set to 0xFFFF'FFFF to indicate they 28 // are invalid. 29 // 30 // 0xFFFFFFFF is an illegal LR value, which is why it was selected for 31 // this purpose. PC and PSR values of 0xFFFFFFFF are dubious too, so this 32 // constant is clear enough at suggesting that the registers weren't 33 // properly captured. 34 constexpr uintptr_t kUndefinedPcLrOrPsrRegValue = 0xFFFF'FFFF; 35 36 // This is dictated by ARMv7-M architecture. Do not change. 37 struct ExceptionRegisters { 38 uint32_t r0; 39 uint32_t r1; 40 uint32_t r2; 41 uint32_t r3; 42 uint32_t r12; 43 uint32_t lr; // Link register, note this may be invalid. 44 uint32_t pc; // Program counter, note this may be invalid. 45 uint32_t psr; // Program status register, note this may be invalid. 46 }; 47 static_assert(sizeof(ExceptionRegisters) == (sizeof(uint32_t) * 8), 48 "There's unexpected padding."); 49 50 // This is dictated by ARMv7-M architecture. Do not change. 51 struct ExceptionRegistersFpu { 52 uint32_t s0; 53 uint32_t s1; 54 uint32_t s2; 55 uint32_t s3; 56 uint32_t s4; 57 uint32_t s5; 58 uint32_t s6; 59 uint32_t s7; 60 uint32_t s8; 61 uint32_t s9; 62 uint32_t s10; 63 uint32_t s11; 64 uint32_t s12; 65 uint32_t s13; 66 uint32_t s14; 67 uint32_t s15; 68 uint32_t fpscr; 69 uint32_t reserved; 70 }; 71 static_assert(sizeof(ExceptionRegistersFpu) == (sizeof(uint32_t) * 18), 72 "There's unexpected padding."); 73 74 // Bit in the PSR that indicates CPU added an extra word on the stack to 75 // align it during context save for an exception. 76 inline constexpr uint32_t kPsrExtraStackAlignBit = (1 << 9); 77 78 // This is dictated by this module, and shouldn't change often. 79 // Note that the order of entries in this struct is very important (as the 80 // values are populated in assembly). 81 // 82 // NOTE: Memory mapped registers are NOT restored upon fault return! 83 struct ExtraRegisters { 84 // Memory mapped registers. 85 uint32_t cfsr; 86 uint32_t mmfar; 87 uint32_t bfar; 88 uint32_t icsr; 89 uint32_t hfsr; 90 uint32_t shcsr; 91 // Special registers. 92 uint32_t exc_return; 93 uint32_t msp; 94 uint32_t psp; 95 uint32_t control; 96 #if _PW_ARCH_ARM_V8M_MAINLINE 97 uint32_t msplim; 98 uint32_t psplim; 99 #endif // _PW_ARCH_ARM_V8M_MAINLINE 100 // General purpose registers. 101 uint32_t r4; 102 uint32_t r5; 103 uint32_t r6; 104 uint32_t r7; 105 uint32_t r8; 106 uint32_t r9; 107 uint32_t r10; 108 uint32_t r11; 109 }; 110 static_assert(sizeof(ExtraRegisters) == 111 #if _PW_ARCH_ARM_V8M_MAINLINE 112 (sizeof(uint32_t) * 20), 113 #else // !_PW_ARCH_ARM_V8M_MAINLINE 114 (sizeof(uint32_t) * 18), 115 #endif // _PW_ARCH_ARM_V8M_MAINLINE 116 "There's unexpected padding."); 117 118 } // namespace pw::cpu_exception::cortex_m 119 120 struct pw_cpu_exception_State { 121 pw::cpu_exception::cortex_m::ExtraRegisters extended; 122 pw::cpu_exception::cortex_m::ExceptionRegisters base; 123 // TODO(amontanez): FPU registers may or may not be here as well. Make the 124 // availability of the FPU registers a compile-time configuration when FPU 125 // register support is added. 126 }; 127 128 #else // !__cplusplus 129 130 typedef struct pw_cpu_exception_State pw_cpu_exception_State; 131 132 #endif // __cplusplus 133