| /external/vixl/test/aarch32/traces/ |
| D | assembler-cond-rd-rn-rev-a32.h | 38 0x31, 0xcf, 0xbf, 0x26 // rev cs r12 r1
41 0x3c, 0x6f, 0xbf, 0x86 // rev hi r6 r12
44 0x3a, 0xbf, 0xbf, 0xb6 // rev lt r11 r10
47 0x38, 0xaf, 0xbf, 0x66 // rev vs r10 r8
50 0x38, 0x5f, 0xbf, 0x56 // rev pl r5 r8
53 0x3e, 0xef, 0xbf, 0x96 // rev ls r14 r14
56 0x36, 0x8f, 0xbf, 0xc6 // rev gt r8 r6
59 0x3b, 0x7f, 0xbf, 0x76 // rev vc r7 r11
62 0x3c, 0x4f, 0xbf, 0x56 // rev pl r4 r12
65 0x3c, 0xcf, 0xbf, 0xc6 // rev gt r12 r12
[all …]
|
| D | assembler-cond-rd-rn-rev-t32.h | 38 0x00, 0xba // rev al r0 r0
41 0x08, 0xba // rev al r0 r1
44 0x10, 0xba // rev al r0 r2
47 0x18, 0xba // rev al r0 r3
50 0x20, 0xba // rev al r0 r4
53 0x28, 0xba // rev al r0 r5
56 0x30, 0xba // rev al r0 r6
59 0x38, 0xba // rev al r0 r7
62 0x98, 0xfa, 0x88, 0xf0 // rev al r0 r8
65 0x99, 0xfa, 0x89, 0xf0 // rev al r0 r9
[all …]
|
| /external/toolchain-utils/llvm_tools/ |
| D | git_llvm_rev.py | 44 class Rev(t.NamedTuple('Rev', (('branch', str), ('number', int)))): class
48 def parse(rev: str) -> 'Rev':
49 """Parses a Rev from the given string.
58 if rev.startswith('r'):
60 rev_string = rev[1:]
62 match = re.match(r'\((.+), r(\d+)\)', rev)
64 raise ValueError("%r isn't a valid revision" % rev)
68 return Rev(branch=branch_name, number=int(rev_string))
116 def translate_sha_to_rev(llvm_config: LLVMConfig, sha_or_ref: str) -> Rev:
117 """Translates a sha or git ref to a Rev."""
[all …]
|
| D | llvm_bisection_unittest.py | 35 'rev': 110,
39 'rev': 120,
43 'rev': 130,
47 'rev': 135,
51 'rev': 140,
69 'rev': 105,
73 'rev': 120,
77 'rev': 140,
94 'rev': 110,
98 'rev': 125,
[all …]
|
| D | git_llvm_rev_test.py | 24 def rev_to_sha_with_round_trip(self, rev: git_llvm_rev.Rev) -> str: argument
26 sha = git_llvm_rev.translate_rev_to_sha(config, rev)
28 self.assertEqual(roundtrip_rev, rev)
33 git_llvm_rev.Rev(
39 git_llvm_rev.Rev(branch=MAIN_BRANCH, number=375000))
44 git_llvm_rev.Rev(branch=MAIN_BRANCH, number=375506))
53 git_llvm_rev.Rev(branch=MAIN_BRANCH, number=374895))
58 git_llvm_rev.Rev(branch=MAIN_BRANCH, number=374841))
65 git_llvm_rev.Rev(branch=MAIN_BRANCH, number=9999999))
74 git_llvm_rev.Rev(branch=MAIN_BRANCH, number=merge_sha_rev_number))
[all …]
|
| D | get_upstream_patch.py | 39 relative_patches_dir: str, start_version: git_llvm_rev.Rev, argument
40 llvm_dir: str, rev: t.Union[git_llvm_rev.Rev, str], sha: str, argument
50 rev: An LLVM revision (git_llvm_rev.Rev) for a cherrypicking, or a
66 is_cherrypick = isinstance(rev, git_llvm_rev.Rev)
70 file_name = f'{rev}.patch'
99 end_vers = rev.number if isinstance(rev, git_llvm_rev.Rev) else None
159 ['git', 'rev-parse', sha],
198 start_rev: git_llvm_rev.Rev, argument
199 rev: t.Union[git_llvm_rev.Rev, str], sha: str, argument
207 logging.info('Getting %s (%s) into %s', rev, sha, package)
[all …]
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| D | llvm_bisection.py | 172 cur_tryjob['rev'] for cur_tryjob in tryjobs
181 cur_tryjob['rev'] for cur_tryjob in tryjobs
199 tryjob['rev']
202 and good_rev < tryjob['rev'] < bad_rev
211 tryjob['rev']
214 and good_rev < tryjob['rev'] < bad_rev
237 rev for rev in range(start + 1, end, index_step)
238 if rev not in pending_revisions and rev not in skip_revisions
241 get_llvm_hash.GetGitHashFrom(src_path, rev) for rev in revisions
325 '\n'.join(str(rev)
[all …]
|
| /external/toybox/www/ |
| D | cleanup.html | 100 <li>commit: <a href=/hg/toybox/rev/830>830</a>: first pass, description: <a href=http://lists.landl…
102 <li>commit: <a href=/hg/toybox/rev/831>831</a>,
104 <li>commit: <a href=/hg/toybox/rev/837>837</a>,
106 <li>commit: <a href=/hg/toybox/rev/853>853</a>, description: bugfix.</li>
125 <li>commit: <a href=/hg/toybox/rev/833>833</a>,
127 <li>commit: <a href=/hg/toybox/rev/835>835</a>,
129 <li>commit: <a href=/hg/toybox/rev/838>838</a>,
131 <li>commit: <a href=/hg/toybox/rev/839>839</a>,
133 <li>commit: <a href=/hg/toybox/rev/840>840</a>,
159 <li>commit: <a href=/hg/toybox/rev/843>843</a>, description: <a href=http://lists.landley.net/piper…
[all …]
|
| /external/llvm/utils/release/ |
| D | merge.sh | 17 rev=""
25 echo " -rev NUM The revision to merge into the project"
32 -rev | --rev | -r )
34 rev=${$1#r}
64 if [ "x$rev" = "x" -o "x$proj" = "x" ]; then
79 echo "Reverting r$rev:" > $tempfile
81 echo "Merging r$rev:" > $tempfile
83 svn log -c $rev http://llvm.org/svn/llvm-project/$proj/trunk >> $tempfile 2>&1
90 echo "# Reverting r$rev in $proj locally"
91 svn merge -c -$rev . || exit 1
[all …]
|
| /external/eigen/bench/perf_monitoring/ |
| D | run.sh | 104 rev=$1
110 prev=`grep $rev "$name.backup" | cut -d ' ' -f 2-`
115 if echo "$global_args" | grep "$rev" > /dev/null; then
120 # echo $update et $selected et $rev_found because $rev et "$global_args"
134 echo "$rev $res" >> $name.out
136 echo "Compilation failed, skip rev $rev"
139 echo "Skip existing results for $rev / $name"
140 echo "$rev $res" >> $name.out
148 cut -f1 -d"#" < changesets.txt | grep -E '[[:alnum:]]' | while read rev
150 if [ ! -z '$rev' ]; then
[all …]
|
| /external/tcpdump/tests/ |
| D | spb_bpduv4-v.out | 5 v3len 80, MCID Name IEEE802.1 SPB Default, rev 0,
11 v4len 85, AUXMCID Name IEEE802.1 SPB Default, Rev 0,
20 v3len 80, MCID Name IEEE802.1 SPB Default, rev 0,
26 v4len 85, AUXMCID Name IEEE802.1 SPB Default, Rev 0,
35 v3len 80, MCID Name IEEE802.1 SPB Default, rev 0,
41 v4len 85, AUXMCID Name IEEE802.1 SPB Default, Rev 0,
50 v3len 80, MCID Name IEEE802.1 SPB Default, rev 0,
56 v4len 85, AUXMCID Name IEEE802.1 SPB Default, Rev 0,
65 v3len 80, MCID Name IEEE802.1 SPB Default, rev 0,
71 v4len 85, AUXMCID Name IEEE802.1 SPB Default, Rev 0,
[all …]
|
| /external/python/cpython2/Demo/pdist/ |
| D | rcslib.py | 100 name, rev = self.checkfile(name_rev)
101 cmd = "rcs -l%s %s" % (rev, name)
106 name, rev = self.checkfile(name_rev)
107 cmd = "rcs -u%s %s" % (rev, name)
121 name, rev = self.checkfile(name_rev)
124 cmd = 'co %s%s %s %s' % (lockflag, rev, otherflags, name)
140 name, rev = self._unmangle(name_rev)
151 (lockflag, rev, f.name, otherflags, name)
155 (lockflag, rev, message, otherflags, name)
228 """Normalize NAME_REV into a (NAME, REV) tuple.
[all …]
|
| /external/python/cpython2/Tools/scripts/ |
| D | logmerge.py | 120 tag, rev = line.split()
123 revisions[tag] = rev
126 rev = revisions.get(branch)
128 if rev:
129 if rev.find('.0.') >= 0:
130 rev = rev.replace('.0.', '.')
131 branch = re.compile(r"^" + re.escape(rev) + r"\.\d+$")
154 rev = words[1]
157 rev = None
160 if rev is None or not branch.match(rev):
[all …]
|
| /external/rust/crates/rayon/src/iter/ |
| D | rev.rs | 5 /// `Rev` is an iterator that produces elements in reverse order. This struct
6 /// is created by the [`rev()`] method on [`IndexedParallelIterator`]
8 /// [`rev()`]: trait.IndexedParallelIterator.html#method.rev
12 pub struct Rev<I: IndexedParallelIterator> { struct
16 impl<I> Rev<I> implementation
20 /// Creates a new `Rev` iterator.
22 Rev { base } in new()
26 impl<I> ParallelIterator for Rev<I> implementation
44 impl<I> IndexedParallelIterator for Rev<I> implementation
97 type IntoIter = iter::Rev<P::IntoIter>;
[all …]
|
| /external/toybox/tests/ |
| D | rev.test | 9 testing "rev" "rev && echo yes" "orez\nyes\n" "" "zero\n"
10 toyonly testing "-" "rev - && echo yes" "orez\nyes\n" "" "zero\n"
11 testing "file1 file2" "rev file1 file2" "eno\nowt\n" "" ""
12 toyonly testing "- file" "rev - file1" "orez\neno\n" "" "zero\n"
13 toyonly testing "file -" "rev file1 -" "eno\norez\n" "" "zero\n"
14 toyonly testing "no trailing newline" "rev input" "cba\nfed\n" "abc\ndef" ""
17 …"rev file1 notfound file2 2>stderr && echo ok ; grep -o 'notfound: No such file or directory' stde…
21 "rev"\
|
| /external/cpuinfo/test/cpuinfo/ |
| D | iconia-one-10.armeabi.log | 2 model name : ARMv8 Processor rev 1 (v8l)
3 Processor : AArch64 Processor rev 1 (aarch64)
4 model name : AArch64 Processor rev 1 (aarch64)
14 model name : ARMv8 Processor rev 1 (v8l)
15 Processor : AArch64 Processor rev 1 (aarch64)
16 model name : AArch64 Processor rev 1 (aarch64)
26 model name : ARMv8 Processor rev 1 (v8l)
27 Processor : AArch64 Processor rev 1 (aarch64)
28 model name : AArch64 Processor rev 1 (aarch64)
|
| D | galaxy-a8-2016-duos.log | 2 model name : ARMv7 Processor rev 1 (v7l)
12 model name : ARMv7 Processor rev 1 (v7l)
22 model name : ARMv7 Processor rev 1 (v7l)
32 model name : ARMv7 Processor rev 1 (v7l)
42 model name : ARMv7 Processor rev 1 (v7l)
52 model name : ARMv7 Processor rev 1 (v7l)
62 model name : ARMv7 Processor rev 1 (v7l)
72 model name : ARMv7 Processor rev 1 (v7l)
84 Processor : ARMv7 Processor rev 1 (v7l)
|
| D | galaxy-s8-us.armeabi.log | 1 Processor : AArch64 Processor rev 4 (aarch64)
3 model name : ARMv8 Processor rev 4 (v8l)
13 model name : ARMv8 Processor rev 4 (v8l)
23 model name : ARMv8 Processor rev 4 (v8l)
33 model name : ARMv8 Processor rev 4 (v8l)
43 model name : ARMv8 Processor rev 1 (v8l)
53 model name : ARMv8 Processor rev 1 (v8l)
63 model name : ARMv8 Processor rev 1 (v8l)
73 model name : ARMv8 Processor rev 1 (v8l)
|
| D | oppo-r15.armeabi.log | 1 Processor : AArch64 Processor rev 4 (aarch64)
3 model name : ARMv8 Processor rev 4 (v8l)
13 model name : ARMv8 Processor rev 4 (v8l)
23 model name : ARMv8 Processor rev 4 (v8l)
33 model name : ARMv8 Processor rev 4 (v8l)
43 model name : ARMv8 Processor rev 2 (v8l)
53 model name : ARMv8 Processor rev 2 (v8l)
63 model name : ARMv8 Processor rev 2 (v8l)
73 model name : ARMv8 Processor rev 2 (v8l)
|
| D | moto-g-gen4.log | 2 model name : ARMv7 Processor rev 4 (v7l)
12 model name : ARMv7 Processor rev 4 (v7l)
22 model name : ARMv7 Processor rev 4 (v7l)
32 model name : ARMv7 Processor rev 4 (v7l)
42 model name : ARMv7 Processor rev 4 (v7l)
52 model name : ARMv7 Processor rev 4 (v7l)
62 model name : ARMv7 Processor rev 4 (v7l)
72 model name : ARMv7 Processor rev 4 (v7l)
84 Processor : ARMv7 Processor rev 4 (v7l)
|
| D | oneplus-5.armeabi.log | 1 Processor : AArch64 Processor rev 4 (aarch64)
3 model name : ARMv8 Processor rev 4 (v8l)
13 model name : ARMv8 Processor rev 4 (v8l)
23 model name : ARMv8 Processor rev 4 (v8l)
33 model name : ARMv8 Processor rev 4 (v8l)
43 model name : ARMv8 Processor rev 1 (v8l)
53 model name : ARMv8 Processor rev 1 (v8l)
63 model name : ARMv8 Processor rev 1 (v8l)
73 model name : ARMv8 Processor rev 1 (v8l)
|
| D | oneplus-5t.armeabi.log | 1 Processor : AArch64 Processor rev 1 (aarch64)
3 model name : ARMv8 Processor rev 4 (v8l)
13 model name : ARMv8 Processor rev 4 (v8l)
23 model name : ARMv8 Processor rev 4 (v8l)
33 model name : ARMv8 Processor rev 4 (v8l)
43 model name : ARMv8 Processor rev 1 (v8l)
53 model name : ARMv8 Processor rev 1 (v8l)
63 model name : ARMv8 Processor rev 1 (v8l)
73 model name : ARMv8 Processor rev 1 (v8l)
|
| D | galaxy-s9-us.armeabi.log | 1 Processor : AArch64 Processor rev 13 (aarch64)
3 model name : ARMv8 Processor rev 12 (v8l)
13 model name : ARMv8 Processor rev 12 (v8l)
23 model name : ARMv8 Processor rev 12 (v8l)
33 model name : ARMv8 Processor rev 12 (v8l)
43 model name : ARMv8 Processor rev 13 (v8l)
53 model name : ARMv8 Processor rev 13 (v8l)
63 model name : ARMv8 Processor rev 13 (v8l)
73 model name : ARMv8 Processor rev 13 (v8l)
|
| /external/perfetto/test/trace_processor/parsing/ |
| D | cpu.out | 2 0,0,"AArch64 Processor rev 13 (aarch64)"
3 1,0,"AArch64 Processor rev 13 (aarch64)"
4 2,0,"AArch64 Processor rev 13 (aarch64)"
5 3,0,"AArch64 Processor rev 13 (aarch64)"
6 4,0,"AArch64 Processor rev 13 (aarch64)"
7 5,0,"AArch64 Processor rev 13 (aarch64)"
8 6,6,"AArch64 Processor rev 13 (aarch64)"
9 7,6,"AArch64 Processor rev 13 (aarch64)"
|
| /external/llvm/utils/crosstool/ |
| D | create-snapshots.sh | 3 # Creates LLVM SVN snapshots: llvm-$REV.tar.bz2 and llvm-gcc-4.2-$REV.tar.bz2,
4 # where $REV is an SVN revision of LLVM. This is used for creating stable
8 # $0 [REV] -- grabs the revision $REV from SVN; if not specified, grabs the
20 readonly REV="${1:-$(getLatestRevisionFromSVN)}"
25 echo "Running: svn export -r ${REV} ${module}; log in ${log}"
26 svn -q export -r ${REV} ${LLVM_PROJECT_SVN}/${module}/trunk \
30 local tarball="${module}-${REV}.tar.bz2"
|