1 /* 2 * Copyright (c) 2017-2020 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_NEGEMMLOWPMATRIXMULTIPLYCORE_H 25 #define ARM_COMPUTE_NEGEMMLOWPMATRIXMULTIPLYCORE_H 26 27 #include "NEActivationLayer.h" 28 #include "arm_compute/runtime/IFunction.h" 29 #include "arm_compute/runtime/IMemoryManager.h" 30 #include "arm_compute/runtime/MemoryGroup.h" 31 #include "arm_compute/runtime/NEON/functions/NEGEMMAssemblyDispatch.h" 32 #include "arm_compute/runtime/Tensor.h" 33 34 #include <memory> 35 36 namespace arm_compute 37 { 38 class ITensor; 39 class NEConvertQuantizedSignednessKernel; 40 class NEConvertQuantizedSignednessKernel; 41 class NEGEMMInterleave4x4Kernel; 42 class NEGEMMLowpMatrixMultiplyKernel; 43 class NEGEMMLowpOffsetContributionKernel; 44 class NEGEMMLowpOffsetContributionOutputStageKernel; 45 class NEGEMMLowpMatrixAReductionKernel; 46 class NEGEMMLowpMatrixBReductionKernel; 47 class NEGEMMTranspose1xWKernel; 48 49 /** Basic function to execute GEMMLowpMatrixMultiplyCore on NEON. This function calls the following NEON kernels if the DOT product instruction is not available: 50 * 51 * -# @ref NEGEMMInterleave4x4Kernel 52 * -# @ref NEGEMMTranspose1xWKernel 53 * -# @ref NEGEMMLowpMatrixMultiplyKernel 54 * -# @ref NEGEMMLowpOffsetContributionKernel 55 * -# @ref NEActivationLayer 56 * 57 * otherwise if the DOT product instruction is available: 58 * 59 * -# @ref NEGEMMLowpOffsetContributionKernel 60 * 61 */ 62 class NEGEMMLowpMatrixMultiplyCore : public IFunction 63 { 64 public: 65 /** Constructor */ 66 NEGEMMLowpMatrixMultiplyCore(std::shared_ptr<IMemoryManager> memory_manager = nullptr, IWeightsManager *weights_manager = nullptr); 67 /** Prevent instances of this class from being copied (As this class contains pointers) */ 68 NEGEMMLowpMatrixMultiplyCore(const NEGEMMLowpMatrixMultiplyCore &) = delete; 69 /** Default move constructor */ 70 NEGEMMLowpMatrixMultiplyCore(NEGEMMLowpMatrixMultiplyCore &&) = default; 71 /** Prevent instances of this class from being copied (As this class contains pointers) */ 72 NEGEMMLowpMatrixMultiplyCore &operator=(const NEGEMMLowpMatrixMultiplyCore &) = delete; 73 /** Default move assignment operator */ 74 NEGEMMLowpMatrixMultiplyCore &operator=(NEGEMMLowpMatrixMultiplyCore &&) = default; 75 /** Default destructor */ 76 ~NEGEMMLowpMatrixMultiplyCore(); 77 /** Initialise the kernel's inputs, output 78 * 79 * @note GEMM_LOWP: low precision GEMM kernel 80 * This kernel performs the following computations: 81 * 82 * -# Convert a values from QASYMM8 to int32 and add a_offset to each of them. 83 * -# Convert b values from QASYMM8 to int32 add b_offset to each of them. 84 * -# Compute the matrix product of the resulting a * b in int32. 85 * 86 * @note The @p output type is S32 if @p gemm_info.type == GEMMLowpOutputStageType::NONE. It is QASYMM8/QASYMM8_SIGNED otherwise 87 * 88 * @param[in] a First input tensor (Matrix A). Data type supported: QASYMM8/QASYMM8_SIGNED. 89 * @param[in] b Second input tensor (Matrix B). Data type supported: QASYMM8/QASYMM8_SIGNED/QSYMM8/QSYMM8_PER_CHANNEL. 90 * @param[in] c Third input tensor (Matrix C). It can be a nullptr. Data type supported: S32 91 * @param[out] output Output tensor. Data type supported: Data type supported: S32/QASYMM8/QASYMM8_SIGNED 92 * @param[in] gemm_info (Optional) Specifies if the matrix A and/or matrix B have been reshaped and 93 * if the reshape of matrix B should be executed only for the first run 94 */ 95 void configure(const ITensor *a, const ITensor *b, const ITensor *c, ITensor *output, const GEMMInfo &gemm_info = GEMMInfo()); 96 /** Static function to check if given info will lead to a valid configuration of @ref NEGEMMLowpMatrixMultiplyCore 97 * 98 * @note The @p output type is S32 if @p gemm_info.type == GEMMLowpOutputStageType::NONE. It is QASYMM8/QASYMM8_SIGNED otherwise 99 * 100 * @param[in] a First input tensor info (Matrix A). Data type supported: QASYMM8/QASYMM8_SIGNED. 101 * @param[in] b Second input tensor info (Matrix B). Data type supported: QASYMM8/QASYMM8_SIGNED/QSYMM8/QSYMM8_PER_CHANNEL. 102 * @param[in] c Third input tensor info (Matrix C). It can be a nullptr. Data type supported: S32 103 * @param[in] output Output tensor info. Data type supported: Data type supported: S32/QASYMM8/QASYMM8_SIGNED 104 * @param[in] gemm_info (Optional) Specifies if the matrix A and/or matrix B have been reshaped and 105 * if the reshape of matrix B should be executed only for the first run 106 * 107 * @return a status 108 */ 109 static Status validate(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *output, const GEMMInfo &gemm_info = GEMMInfo()); 110 111 // Inherited methods overridden 112 void run() override; 113 void prepare() override; 114 115 private: 116 MemoryGroup _memory_group; 117 IWeightsManager *_weights_manager; 118 NEGEMMAssemblyDispatch _asm_glue; 119 std::unique_ptr<NEGEMMLowpMatrixMultiplyKernel> _mm_kernel; 120 std::unique_ptr<NEGEMMInterleave4x4Kernel> _mtx_a_reshape_kernel; 121 std::unique_ptr<NEGEMMTranspose1xWKernel> _mtx_b_reshape_kernel; 122 std::unique_ptr<NEGEMMLowpMatrixAReductionKernel> _mtx_a_reduction_kernel; 123 std::unique_ptr<NEGEMMLowpMatrixBReductionKernel> _mtx_b_reduction_kernel; 124 std::unique_ptr<NEGEMMLowpOffsetContributionKernel> _offset_contribution_kernel; 125 std::unique_ptr<NEGEMMLowpOffsetContributionOutputStageKernel> _offset_contribution_output_stage_kernel; 126 NEActivationLayer _activation_func; 127 std::unique_ptr<NEConvertQuantizedSignednessKernel> _convert_to_signed_asymm; 128 std::unique_ptr<NEConvertQuantizedSignednessKernel> _convert_from_signed_asymm; 129 130 Tensor _vector_sum_col; 131 Tensor _vector_sum_row; 132 Tensor _tmp_a; 133 Tensor _tmp_b; 134 Tensor _mm_result_s32; 135 Tensor _signed_a; 136 Tensor _signed_output; 137 const ITensor *_original_b; 138 int32_t _a_offset; 139 int32_t _b_offset; 140 141 bool _run_vector_matrix_multiplication; 142 bool _assembly_path; 143 bool _fused_assembly_path; 144 bool _reshape_b_only_on_first_run; 145 bool _is_prepared; 146 bool _fuse_output_stage; 147 bool _run_activation; 148 bool _flip_signedness; 149 }; 150 } // namespace arm_compute 151 #endif /*ARM_COMPUTE_NEGEMMLOWPMATRIXMULTIPLYCORE_H */ 152