1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
18 extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
19
xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x16(size_t elements,const float * input,const float * max,float * output,float * sum,const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x16(
21 size_t elements,
22 const float* input,
23 const float* max,
24 float* output,
25 float* sum,
26 const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
27 {
28 assert(elements % sizeof(float) == 0);
29
30 const float32x4_t vi_max = vld1q_dup_f32(max);
31 const float32x4_t vlog2e = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.log2e);
32 const float32x4_t vmagic_bias = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.magic_bias);
33 const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
34 const float32x4_t vminus_ln2_hi = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.minus_ln2_hi);
35 const float32x4_t vminus_ln2_lo = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.minus_ln2_lo);
36 const float32x4_t vc2 = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.c2);
37 const float32x4_t vdenorm_cutoff = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.denorm_cutoff);
38
39 float32x4_t vacc0 = vmovq_n_f32(0.0f);
40 for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
41 const float32x4_t vi0123 = vld1q_f32(input); input += 4;
42 const float32x4_t vi4567 = vld1q_f32(input); input += 4;
43 const float32x4_t vi89AB = vld1q_f32(input); input += 4;
44 const float32x4_t viCDEF = vld1q_f32(input); input += 4;
45
46 const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
47 const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
48 const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
49 const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
50
51 float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
52 float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
53 float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
54 float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e);
55
56 const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
57 const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
58 const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
59 const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
60
61 const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
62 const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
63 const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
64 const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
65 const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
66 const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
67 const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
68 const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
69 const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
70 const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
71 const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
72 const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
73
74 float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
75 float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
76 float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
77 float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
78 float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
79 float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
80 float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
81 float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
82
83 vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
84 vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
85 const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
86 vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
87 vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
88 const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
89 vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
90 vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
91 const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
92 vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
93 vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
94 const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
95
96 const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
97 const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
98 const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
99 const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
100
101 vn0123 = vsubq_f32(vn0123, vmagic_bias);
102 vn4567 = vsubq_f32(vn4567, vmagic_bias);
103 vn89AB = vsubq_f32(vn89AB, vmagic_bias);
104 vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
105
106 float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
107 float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
108 float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
109 float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
110
111 vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
112 vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
113 vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
114 vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
115
116 float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
117 float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
118 float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
119 float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
120
121 vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
122 vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
123 vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
124 vpCDEF = vmlaq_f32(vtCDEF, vtCDEF, vpCDEF);
125
126 float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
127 float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
128 float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
129 float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vsCDEF, vpCDEF);
130
131 vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
132 vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
133 vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
134 vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
135
136 vst1q_f32(output, vf0123); output += 4;
137 vst1q_f32(output, vf4567); output += 4;
138 vst1q_f32(output, vf89AB); output += 4;
139 vst1q_f32(output, vfCDEF); output += 4;
140
141 vacc0 = vaddq_f32(vacc0, vf0123);
142 vacc0 = vaddq_f32(vacc0, vf4567);
143 vacc0 = vaddq_f32(vacc0, vf89AB);
144 vacc0 = vaddq_f32(vacc0, vfCDEF);
145 }
146
147 float32x4_t vacc = vacc0;
148 for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
149 const float32x4_t vi = vld1q_f32(input); input += 4;
150
151 const float32x4_t vx = vsubq_f32(vi, vi_max);
152
153 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
154
155 const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
156
157 const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
158 const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
159 const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
160 float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
161 float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
162 vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
163 vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
164 const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
165 const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
166
167 vn = vsubq_f32(vn, vmagic_bias);
168
169 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
170 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
171
172 float32x4_t vp = vmulq_f32(vt, vc2);
173 vp = vmlaq_f32(vt, vt, vp);
174
175 float32x4_t vf = vmlaq_f32(vs, vs, vp);
176
177 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
178
179 vst1q_f32(output, vf); output += 4;
180
181 vacc = vaddq_f32(vacc, vf);
182 }
183 #if XNN_ARCH_ARM64
184 float vacc_lo = vaddvq_f32(vacc);
185 #else
186 float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
187 #endif
188 if (elements != 0) {
189 assert(elements >= 1 * sizeof(float));
190 assert(elements <= 3 * sizeof(float));
191 const float32x4_t vi = vld1q_f32(input); input += 4;
192
193 const float32x4_t vx = vsubq_f32(vi, vi_max);
194
195 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
196
197 const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
198
199 const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
200 const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
201 const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
202 float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
203 float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
204 vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
205 vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
206 const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
207 const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
208
209 vn = vsubq_f32(vn, vmagic_bias);
210
211 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
212 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
213
214 float32x4_t vp = vmulq_f32(vt, vc2);
215 vp = vmlaq_f32(vt, vt, vp);
216
217 float32x4_t vf = vmlaq_f32(vs, vs, vp);
218
219 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
220
221 float32x2_t vf_lo = vget_low_f32(vf);
222 if (elements & (2 * sizeof(float))) {
223 vst1_f32(output, vf_lo); output += 2;
224
225 #if XNN_ARCH_ARM64
226 vacc_lo += vaddv_f32(vf_lo);
227 #else
228 vacc_lo = vadd_f32(vacc_lo, vf_lo);
229 #endif
230
231 vf_lo = vget_high_f32(vf);
232 }
233 if (elements & (1 * sizeof(float))) {
234 vst1_lane_f32(output, vf_lo, 0);
235
236 #if XNN_ARCH_ARM64
237 vacc_lo += vget_lane_f32(vf_lo, 0);
238 #else
239 vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
240 #endif
241 }
242 }
243 #if XNN_ARCH_ARM64
244 *sum = vacc_lo;
245 #else
246 vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
247 #endif
248 }
249