1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x12(size_t elements,const float * input,const float * max,float * output,float * sum,const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x12(
19 size_t elements,
20 const float* input,
21 const float* max,
22 float* output,
23 float* sum,
24 const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(elements % sizeof(float) == 0);
27
28 const float32x4_t vi_max = vld1q_dup_f32(max);
29 const float32x4_t vlog2e = vld1q_dup_f32(¶ms->neonfma_rr1_p5.log2e);
30 const float32x4_t vmagic_bias = vld1q_dup_f32(¶ms->neonfma_rr1_p5.magic_bias);
31 const float32x4_t vminus_ln2 = vld1q_dup_f32(¶ms->neonfma_rr1_p5.minus_ln2);
32 const float32x4_t vc5 = vld1q_dup_f32(¶ms->neonfma_rr1_p5.c5);
33 const float32x4_t vc4 = vld1q_dup_f32(¶ms->neonfma_rr1_p5.c4);
34 const float32x4_t vc3 = vld1q_dup_f32(¶ms->neonfma_rr1_p5.c3);
35 const float32x4_t vc2 = vld1q_dup_f32(¶ms->neonfma_rr1_p5.c2);
36 const float32x4_t vc1 = vld1q_dup_f32(¶ms->neonfma_rr1_p5.c1);
37 const float32x4_t vdenorm_cutoff = vld1q_dup_f32(¶ms->neonfma_rr1_p5.denorm_cutoff);
38
39 float32x4_t vacc0 = vmovq_n_f32(0.0f);
40 for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
41 const float32x4_t vi0123 = vld1q_f32(input); input += 4;
42 const float32x4_t vi4567 = vld1q_f32(input); input += 4;
43 const float32x4_t vi89AB = vld1q_f32(input); input += 4;
44
45 const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
46 const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
47 const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
48
49 float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
50 float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
51 float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
52
53 const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
54 const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
55 const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
56
57 vn0123 = vsubq_f32(vn0123, vmagic_bias);
58 vn4567 = vsubq_f32(vn4567, vmagic_bias);
59 vn89AB = vsubq_f32(vn89AB, vmagic_bias);
60
61 float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2);
62 float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2);
63 float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2);
64
65 float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
66 float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
67 float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
68
69 vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
70 vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
71 vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
72
73 vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
74 vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
75 vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
76
77 vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
78 vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
79 vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
80
81 vt0123 = vmulq_f32(vt0123, vs0123);
82 vt4567 = vmulq_f32(vt4567, vs4567);
83 vt89AB = vmulq_f32(vt89AB, vs89AB);
84
85 float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
86 float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
87 float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
88
89 vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
90 vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
91 vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
92
93 vst1q_f32(output, vf0123); output += 4;
94 vst1q_f32(output, vf4567); output += 4;
95 vst1q_f32(output, vf89AB); output += 4;
96
97 vacc0 = vaddq_f32(vacc0, vf0123);
98 vacc0 = vaddq_f32(vacc0, vf4567);
99 vacc0 = vaddq_f32(vacc0, vf89AB);
100 }
101
102 float32x4_t vacc = vacc0;
103 for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
104 const float32x4_t vi = vld1q_f32(input); input += 4;
105
106 const float32x4_t vx = vsubq_f32(vi, vi_max);
107
108 float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
109
110 const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
111
112 vn = vsubq_f32(vn, vmagic_bias);
113
114 float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2);
115
116 float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
117 vp = vfmaq_f32(vc3, vp, vt);
118 vp = vfmaq_f32(vc2, vp, vt);
119 vp = vfmaq_f32(vc1, vp, vt);
120
121 vt = vmulq_f32(vt, vs);
122 float32x4_t vf = vfmaq_f32(vs, vp, vt);
123
124 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
125
126 vst1q_f32(output, vf); output += 4;
127
128 vacc = vaddq_f32(vacc, vf);
129 }
130 #if XNN_ARCH_ARM64
131 float vacc_lo = vaddvq_f32(vacc);
132 #else
133 float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
134 #endif
135 if (elements != 0) {
136 assert(elements >= 1 * sizeof(float));
137 assert(elements <= 3 * sizeof(float));
138 const float32x4_t vi = vld1q_f32(input); input += 4;
139
140 const float32x4_t vx = vsubq_f32(vi, vi_max);
141
142 float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
143
144 const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
145
146 vn = vsubq_f32(vn, vmagic_bias);
147
148 float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2);
149
150 float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
151 vp = vfmaq_f32(vc3, vp, vt);
152 vp = vfmaq_f32(vc2, vp, vt);
153 vp = vfmaq_f32(vc1, vp, vt);
154
155 vt = vmulq_f32(vt, vs);
156 float32x4_t vf = vfmaq_f32(vs, vp, vt);
157
158 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
159
160 float32x2_t vf_lo = vget_low_f32(vf);
161 if (elements & (2 * sizeof(float))) {
162 vst1_f32(output, vf_lo); output += 2;
163
164 #if XNN_ARCH_ARM64
165 vacc_lo += vaddv_f32(vf_lo);
166 #else
167 vacc_lo = vadd_f32(vacc_lo, vf_lo);
168 #endif
169
170 vf_lo = vget_high_f32(vf);
171 }
172 if (elements & (1 * sizeof(float))) {
173 vst1_lane_f32(output, vf_lo, 0);
174
175 #if XNN_ARCH_ARM64
176 vacc_lo += vget_lane_f32(vf_lo, 0);
177 #else
178 vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
179 #endif
180 }
181 }
182 #if XNN_ARCH_ARM64
183 *sum = vacc_lo;
184 #else
185 vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
186 #endif
187 }
188