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1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-velu/avx-rr2-p6.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <immintrin.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16 
17 
xnn_f32_velu_ukernel__avx_rr2_p6_x40(size_t n,const float * x,float * y,const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f32_velu_ukernel__avx_rr2_p6_x40(
19     size_t n,
20     const float* x,
21     float* y,
22     const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)])
23 {
24   assert(n % sizeof(float) == 0);
25 
26   const __m256 vprescale = _mm256_load_ps(params->avx_rr2_p6.prescale);
27   const __m256 valpha = _mm256_load_ps(params->avx_rr2_p6.alpha);
28   const __m256 vbeta = _mm256_load_ps(params->avx_rr2_p6.beta);
29   const __m256 vsat_cutoff = _mm256_load_ps(params->avx_rr2_p6.sat_cutoff);
30   const __m256 vmagic_bias = _mm256_load_ps(params->avx_rr2_p6.magic_bias);
31   const __m256 vlog2e = _mm256_load_ps(params->avx_rr2_p6.log2e);
32   const __m256 vminus_ln2_hi = _mm256_load_ps(params->avx_rr2_p6.minus_ln2_hi);
33   const __m256 vminus_ln2_lo = _mm256_load_ps(params->avx_rr2_p6.minus_ln2_lo);
34   const __m256 vc6 = _mm256_load_ps(params->avx_rr2_p6.c6);
35   const __m256 vc5 = _mm256_load_ps(params->avx_rr2_p6.c5);
36   const __m256 vc4 = _mm256_load_ps(params->avx_rr2_p6.c4);
37   const __m256 vc3 = _mm256_load_ps(params->avx_rr2_p6.c3);
38   const __m256 vc2 = _mm256_load_ps(params->avx_rr2_p6.c2);
39   const __m256 vone = _mm256_load_ps(params->avx_rr2_p6.one);
40 
41   for (; n >= 40 * sizeof(float); n -= 40 * sizeof(float)) {
42     __m256 vx0 = _mm256_loadu_ps(x);
43     __m256 vx1 = _mm256_loadu_ps(x + 8);
44     __m256 vx2 = _mm256_loadu_ps(x + 16);
45     __m256 vx3 = _mm256_loadu_ps(x + 24);
46     __m256 vx4 = _mm256_loadu_ps(x + 32);
47     x += 40;
48 
49     const __m256 vz0 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx0, vprescale));
50     const __m256 vz1 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx1, vprescale));
51     const __m256 vz2 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx2, vprescale));
52     const __m256 vz3 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx3, vprescale));
53     const __m256 vz4 = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx4, vprescale));
54 
55     __m256 vn0 = _mm256_add_ps(_mm256_mul_ps(vz0, vlog2e), vmagic_bias);
56     __m256 vn1 = _mm256_add_ps(_mm256_mul_ps(vz1, vlog2e), vmagic_bias);
57     __m256 vn2 = _mm256_add_ps(_mm256_mul_ps(vz2, vlog2e), vmagic_bias);
58     __m256 vn3 = _mm256_add_ps(_mm256_mul_ps(vz3, vlog2e), vmagic_bias);
59     __m256 vn4 = _mm256_add_ps(_mm256_mul_ps(vz4, vlog2e), vmagic_bias);
60 
61     const __m128 vs0_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn0)), 23));
62     const __m128 vs0_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn0, 1)), 23));
63     vn0 = _mm256_sub_ps(vn0, vmagic_bias);
64     const __m128 vs1_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn1)), 23));
65     const __m128 vs1_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn1, 1)), 23));
66     vn1 = _mm256_sub_ps(vn1, vmagic_bias);
67     const __m128 vs2_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn2)), 23));
68     const __m128 vs2_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn2, 1)), 23));
69     vn2 = _mm256_sub_ps(vn2, vmagic_bias);
70     const __m128 vs3_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn3)), 23));
71     const __m128 vs3_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn3, 1)), 23));
72     vn3 = _mm256_sub_ps(vn3, vmagic_bias);
73     const __m128 vs4_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn4)), 23));
74     const __m128 vs4_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn4, 1)), 23));
75     vn4 = _mm256_sub_ps(vn4, vmagic_bias);
76 
77     __m256 vt0 = _mm256_add_ps(_mm256_mul_ps(vn0, vminus_ln2_hi), vz0);
78     __m256 vs0 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs0_lo), vs0_hi, 1);
79     __m256 vt1 = _mm256_add_ps(_mm256_mul_ps(vn1, vminus_ln2_hi), vz1);
80     __m256 vs1 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs1_lo), vs1_hi, 1);
81     __m256 vt2 = _mm256_add_ps(_mm256_mul_ps(vn2, vminus_ln2_hi), vz2);
82     __m256 vs2 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs2_lo), vs2_hi, 1);
83     __m256 vt3 = _mm256_add_ps(_mm256_mul_ps(vn3, vminus_ln2_hi), vz3);
84     __m256 vs3 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs3_lo), vs3_hi, 1);
85     __m256 vt4 = _mm256_add_ps(_mm256_mul_ps(vn4, vminus_ln2_hi), vz4);
86     __m256 vs4 = _mm256_insertf128_ps(_mm256_castps128_ps256(vs4_lo), vs4_hi, 1);
87 
88     vt0 = _mm256_add_ps(_mm256_mul_ps(vn0, vminus_ln2_lo), vt0);
89     vt1 = _mm256_add_ps(_mm256_mul_ps(vn1, vminus_ln2_lo), vt1);
90     vt2 = _mm256_add_ps(_mm256_mul_ps(vn2, vminus_ln2_lo), vt2);
91     vt3 = _mm256_add_ps(_mm256_mul_ps(vn3, vminus_ln2_lo), vt3);
92     vt4 = _mm256_add_ps(_mm256_mul_ps(vn4, vminus_ln2_lo), vt4);
93 
94     __m256 vp0 = _mm256_add_ps(_mm256_mul_ps(vc6, vt0), vc5);
95     __m256 vp1 = _mm256_add_ps(_mm256_mul_ps(vc6, vt1), vc5);
96     __m256 vp2 = _mm256_add_ps(_mm256_mul_ps(vc6, vt2), vc5);
97     __m256 vp3 = _mm256_add_ps(_mm256_mul_ps(vc6, vt3), vc5);
98     __m256 vp4 = _mm256_add_ps(_mm256_mul_ps(vc6, vt4), vc5);
99 
100     vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc4);
101     vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc4);
102     vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc4);
103     vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc4);
104     vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vc4);
105 
106     vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc3);
107     vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc3);
108     vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc3);
109     vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc3);
110     vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vc3);
111 
112     vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vc2);
113     vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vc2);
114     vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vc2);
115     vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vc2);
116     vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vc2);
117 
118     vp0 = _mm256_mul_ps(vp0, vt0);
119     vp1 = _mm256_mul_ps(vp1, vt1);
120     vp2 = _mm256_mul_ps(vp2, vt2);
121     vp3 = _mm256_mul_ps(vp3, vt3);
122     vp4 = _mm256_mul_ps(vp4, vt4);
123 
124     vt0 = _mm256_mul_ps(vt0, vs0);
125     vs0 = _mm256_sub_ps(vs0, vone);
126     vt1 = _mm256_mul_ps(vt1, vs1);
127     vs1 = _mm256_sub_ps(vs1, vone);
128     vt2 = _mm256_mul_ps(vt2, vs2);
129     vs2 = _mm256_sub_ps(vs2, vone);
130     vt3 = _mm256_mul_ps(vt3, vs3);
131     vs3 = _mm256_sub_ps(vs3, vone);
132     vt4 = _mm256_mul_ps(vt4, vs4);
133     vs4 = _mm256_sub_ps(vs4, vone);
134 
135     vp0 = _mm256_add_ps(_mm256_mul_ps(vp0, vt0), vt0);
136     vp1 = _mm256_add_ps(_mm256_mul_ps(vp1, vt1), vt1);
137     vp2 = _mm256_add_ps(_mm256_mul_ps(vp2, vt2), vt2);
138     vp3 = _mm256_add_ps(_mm256_mul_ps(vp3, vt3), vt3);
139     vp4 = _mm256_add_ps(_mm256_mul_ps(vp4, vt4), vt4);
140 
141     const __m256 ve0 = _mm256_mul_ps(_mm256_add_ps(vp0, vs0), valpha);
142     vx0 = _mm256_mul_ps(vx0, vbeta);
143     const __m256 ve1 = _mm256_mul_ps(_mm256_add_ps(vp1, vs1), valpha);
144     vx1 = _mm256_mul_ps(vx1, vbeta);
145     const __m256 ve2 = _mm256_mul_ps(_mm256_add_ps(vp2, vs2), valpha);
146     vx2 = _mm256_mul_ps(vx2, vbeta);
147     const __m256 ve3 = _mm256_mul_ps(_mm256_add_ps(vp3, vs3), valpha);
148     vx3 = _mm256_mul_ps(vx3, vbeta);
149     const __m256 ve4 = _mm256_mul_ps(_mm256_add_ps(vp4, vs4), valpha);
150     vx4 = _mm256_mul_ps(vx4, vbeta);
151 
152     const __m256 vy0 = _mm256_blendv_ps(vx0, ve0, vx0);
153     const __m256 vy1 = _mm256_blendv_ps(vx1, ve1, vx1);
154     const __m256 vy2 = _mm256_blendv_ps(vx2, ve2, vx2);
155     const __m256 vy3 = _mm256_blendv_ps(vx3, ve3, vx3);
156     const __m256 vy4 = _mm256_blendv_ps(vx4, ve4, vx4);
157 
158     _mm256_storeu_ps(y, vy0);
159     _mm256_storeu_ps(y + 8, vy1);
160     _mm256_storeu_ps(y + 16, vy2);
161     _mm256_storeu_ps(y + 24, vy3);
162     _mm256_storeu_ps(y + 32, vy4);
163     y += 40;
164   }
165   for (; n >= 8 * sizeof(float); n -= 8 * sizeof(float)) {
166     __m256 vx = _mm256_loadu_ps(x);
167     x += 8;
168 
169     const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
170 
171     __m256 vn = _mm256_add_ps(_mm256_mul_ps(vz, vlog2e), vmagic_bias);
172     const __m128 vs_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn)), 23));
173     const __m128 vs_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn, 1)), 23));
174     vn = _mm256_sub_ps(vn, vmagic_bias);
175 
176     __m256 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_hi), vz);
177     __m256 vs = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo), vs_hi, 1);
178     vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_lo), vt);
179 
180     __m256 vp = _mm256_add_ps(_mm256_mul_ps(vc6, vt), vc5);
181     vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc4);
182     vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc3);
183     vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc2);
184     vp = _mm256_mul_ps(vp, vt);
185 
186     vt = _mm256_mul_ps(vt, vs);
187     vs = _mm256_sub_ps(vs, vone);
188     vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vt);
189 
190     const __m256 ve = _mm256_mul_ps(_mm256_add_ps(vp, vs), valpha);
191     vx = _mm256_mul_ps(vx, vbeta);
192     const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
193 
194     _mm256_storeu_ps(y, vy);
195     y += 8;
196   }
197   if XNN_UNLIKELY(n != 0) {
198     assert(n >= 1 * sizeof(float));
199     assert(n <= 7 * sizeof(float));
200     const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &params->avx_rr2_p6.mask_table[7] - n));
201 
202     __m256 vx = _mm256_maskload_ps(x, vmask);
203 
204     const __m256 vz = _mm256_max_ps(vsat_cutoff, _mm256_mul_ps(vx, vprescale));
205 
206     __m256 vn = _mm256_add_ps(_mm256_mul_ps(vz, vlog2e), vmagic_bias);
207     const __m128 vs_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(vn)), 23));
208     const __m128 vs_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(vn, 1)), 23));
209     vn = _mm256_sub_ps(vn, vmagic_bias);
210 
211     __m256 vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_hi), vz);
212     __m256 vs = _mm256_insertf128_ps(_mm256_castps128_ps256(vs_lo), vs_hi, 1);
213     vt = _mm256_add_ps(_mm256_mul_ps(vn, vminus_ln2_lo), vt);
214 
215     __m256 vp = _mm256_add_ps(_mm256_mul_ps(vc6, vt), vc5);
216     vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc4);
217     vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc3);
218     vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vc2);
219     vp = _mm256_mul_ps(vp, vt);
220 
221     vt = _mm256_mul_ps(vt, vs);
222     vs = _mm256_sub_ps(vs, vone);
223     vp = _mm256_add_ps(_mm256_mul_ps(vp, vt), vt);
224 
225     const __m256 ve = _mm256_mul_ps(_mm256_add_ps(vp, vs), valpha);
226     vx = _mm256_mul_ps(vx, vbeta);
227     const __m256 vy = _mm256_blendv_ps(vx, ve, vx);
228 
229     __m128 vy_lo = _mm256_castps256_ps128(vy);
230     if (n & (4 * sizeof(float))) {
231       _mm_storeu_ps(y, vy_lo);
232       vy_lo = _mm256_extractf128_ps(vy, 1);
233       y += 4;
234     }
235     if (n & (2 * sizeof(float))) {
236       _mm_storel_pi((__m64*) y, vy_lo);
237       vy_lo = _mm_movehl_ps(vy_lo, vy_lo);
238       y += 2;
239     }
240     if (n & (1 * sizeof(float))) {
241       _mm_store_ss(y, vy_lo);
242     }
243   }
244 }
245